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authorRob Herring <rob.herring@calxeda.com>2011-12-29 06:19:54 +0000
committerPeter Maydell <peter.maydell@linaro.org>2012-01-04 13:41:42 +0000
commitb2123a48566ab0636b78dda6b9c37c54bff69e6b (patch)
treefd19ff5b26f480bc9a21fc6bf6a046e1af15390b /cmd.c
parentb79f22656f47f0f8b4b89f096f5ae67d0cf268eb (diff)
add L2x0/PL310 cache controller device
This is just a dummy device for ARM L2 cache controllers, based on the pl310. The cache type parameter can be defined by a property value and has a meaningful default. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com> [Peter Maydell: removed stray blank line at end] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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