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authorAlexander Graf <agraf@suse.de>2013-05-08 15:19:14 +0200
committerAlexander Graf <agraf@suse.de>2013-05-08 20:23:20 +0200
commit36f48d9c78c438170aa7259bdde67086c9b7e795 (patch)
tree32efc4dca970b3b39c3ad36ffd4e9e2daffc1b0d /bt-vhci.c
parent554ecc5774badd181458fe3d6a1624c2ede9f04e (diff)
PPC: Depend behavior of cmp instructions only on instruction encoding
When running an L=1 cmp instruction on a 64bit PPC CPU with SF off, it still behaves identical to what it does when SF is on. Remove the implicit difference in the code. Also, on most 32bit CPUs we should always treat the compare as 32bit compare, as the CPU will ignore the L bit. This is not true for e500mc, but that's up for a different patch. Reported-by: Torbjorn Granlund <tg@gmplib.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'bt-vhci.c')
0 files changed, 0 insertions, 0 deletions