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authorBin Meng <bin.meng@windriver.com>2020-06-15 17:50:40 -0700
committerAlistair Francis <alistair.francis@wdc.com>2020-06-19 08:25:27 -0700
commit49093916d37f663e86316ec54cb77d5515bb973f (patch)
treeb8bb02546172fbf903ebe552396ce649742e871f /bootdevice.c
parent17aad9f276953c1eaf0750faf4758fd2f5ebeb84 (diff)
hw/riscv: sifive_u: Sort the SoC memmap table entries
Move the flash and DRAM to the end of the SoC memmap table. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1592268641-7478-5-git-send-email-bmeng.cn@gmail.com Message-Id: <1592268641-7478-5-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'bootdevice.c')
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