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author | Peter Maydell <peter.maydell@linaro.org> | 2014-02-26 17:20:04 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2014-02-26 17:20:04 +0000 |
commit | 327ed10fa2331384c1a58c794e0356e6d88089c8 (patch) | |
tree | 7c0a3f3bc6e638a341800158846f35f0eb4964d5 /block/qcow2-refcount.c | |
parent | a505d7fe5f638c4aaba93150f71968147f7c2b3a (diff) |
target-arm: Implement AArch64 TTBR*
Implement the AArch64 TTBR* registers. For v7 these were already 64 bits
to handle LPAE, but implemented as two separate uint32_t fields.
Combine them into a single uint64_t which can be used for all purposes.
Since this requires touching every use, take the opportunity to rename
the field to the architectural name.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Diffstat (limited to 'block/qcow2-refcount.c')
0 files changed, 0 insertions, 0 deletions