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| author | Peter Maydell <peter.maydell@linaro.org> | 2012-07-12 10:59:07 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2012-07-12 10:59:54 +0000 |
| commit | 7ac681cf2aafcef4b17f0f6007e1f4a2520528db (patch) | |
| tree | c15af37f3034a1cda1a2d95f2ced5231da49bb12 /block.c | |
| parent | 918f5dca18d62d014bc84fde726a88bd7e8d3615 (diff) | |
target-arm: Add AMAIR0, AMAIR1 LPAE cp15 registers
Add implementations of the AMAIR0 and AMAIR1 LPAE
Auxiliary Memory Attribute Indirection Registers.
These are implementation defined and we choose to
implement them as RAZ/WI, matching the Cortex-A7
and Cortex-A15.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'block.c')
0 files changed, 0 insertions, 0 deletions