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authorJonathan Cameron <jonathan.cameron@huawei.com>2022-04-29 15:40:58 +0100
committerMichael S. Tsirkin <mst@redhat.com>2022-05-13 07:57:26 -0400
commiteb19d9079efc4e986a37b0c3172ecd9b617fd04a (patch)
tree05fb78b7693ccfbbd115277ae6db32a93ebc3cf6 /audio
parent5fcc499ee3457709657b23655e385613a437068d (diff)
cxl/cxl-host: Add memops for CFMWS region.
These memops perform interleave decoding, walking down the CXL topology from CFMWS described host interleave decoder via CXL host bridge HDM decoders, through the CXL root ports and finally call CXL type 3 specific read and write functions. Note that, whilst functional the current implementation does not support: * switches * multiple HDM decoders at a given level. * unaligned accesses across the interleave boundaries Signed-off-by: Jonathan Cameron <jonathan.cameron@huawei.com> Message-Id: <20220429144110.25167-34-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'audio')
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