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authorLuc MICHEL <luc.michel@git.antfield.fr>2018-01-25 11:45:30 +0000
committerPeter Maydell <peter.maydell@linaro.org>2018-01-25 11:45:30 +0000
commitfc05a6f22a15503b1e95be640a62e44a06c95d25 (patch)
tree703f6b01d882bed09c436c463459ed761d804882 /accel
parent71aa735b0a12201c2b14a76004ee3a58ff43798c (diff)
hw/intc/arm_gic: Fix group priority computation for group 1 IRQs
When determining the group priority of a group 1 IRQ, if C_CTRL.CBPR is 0, the non-secure BPR value is used. However, this value must be incremented by one so that it matches the secure world number of implemented priority bits (NS world has one less priority bit compared to the Secure world). Signed-off-by: Luc MICHEL <luc.michel@git.antfield.fr> Message-id: 20180119145756.7629-5-luc.michel@greensocs.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: add assert, as the gicv3 code has] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'accel')
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