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author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2018-05-15 14:58:44 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2018-05-15 14:58:44 +0100 |
commit | f6fb1f9b319feac09119848d206b07640ddd39e7 (patch) | |
tree | e2abff995b955df574110b91770d3934c0c45e1d /accel | |
parent | 905edee9101c54cda5b72286b7f7607cf1c3c4d1 (diff) |
sdcard: Correct CRC16 offset in sd_function_switch()
Per the Physical Layer Simplified Spec. "4.3.10.4 Switch Function Status":
The block length is predefined to 512 bits
and "4.10.2 SD Status":
The SD Status contains status bits that are related to the SD Memory Card
proprietary features and may be used for future application-specific usage.
The size of the SD Status is one data block of 512 bit. The content of this
register is transmitted to the Host over the DAT bus along with a 16-bit CRC.
Thus the 16-bit CRC goes at offset 64.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20180509060104.4458-3-f4bug@amsat.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'accel')
0 files changed, 0 insertions, 0 deletions