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authorRichard Henderson <richard.henderson@linaro.org>2022-04-20 16:43:11 -0700
committerRichard Henderson <richard.henderson@linaro.org>2022-04-20 16:43:11 -0700
commit9c125d17e9402c232c46610802e5931b3639d77b (patch)
tree66c34f77ce848fdb3e41a0031f907eec7066d031 /accel
parent27a985159a80430a0a43161797ca14ef946962b8 (diff)
parenta61532faa5a4d5e021e35b6a4a1e180c72d4a22f (diff)
Merge tag 'pull-tcg-20220420' of https://gitlab.com/rth7680/qemu into staging
Cleanup sysemu/tcg.h usage. Fix indirect lowering vs cond branches Remove ATOMIC_MMU_IDX Add tcg_constant_ptr # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmJgW38dHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV8tpggApfg2CDI0bRMDBh0g # 04/xwNnzHuSa84/ocMOMUfD5pvBblUmeTH8fAwqcAPDM/EEZwWZl2V1bYzuIrbmR # 8zV+r1cOenDF5Tz8PWfy8XssinTVtTWh/TE0XNV9R/SbEM9eMsjHNu5osKVuLuq1 # rnHWZf8LuY7xGsy4GYqPN0dLE6HtQOfpj/eLGRAj9mZ7re0jKeWg3GdxYoiYDmks # NKmNHYcWD+SjjFvXlOafniQsHbBZmQc/qp7AShG/+VcYY9o1VfncWD6I2dV13RdB # N7++ZhGyQR4NOVo6CN1zLKhfuJqzH2q+qJ7vQ3xtXNAk53LGQ91zjoE+3KaJTrcy # dmnLUw== # =aKdS # -----END PGP SIGNATURE----- # gpg: Signature made Wed 20 Apr 2022 12:14:07 PM PDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate] * tag 'pull-tcg-20220420' of https://gitlab.com/rth7680/qemu: tcg: Add tcg_constant_ptr accel/tcg: Remove ATOMIC_MMU_IDX tcg: Fix indirect lowering vs TCG_OPF_COND_BRANCH Don't include sysemu/tcg.h if it is not necessary Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'accel')
-rw-r--r--accel/tcg/cputlb.c1
-rw-r--r--accel/tcg/hmp.c1
-rw-r--r--accel/tcg/tcg-accel-ops-icount.c1
-rw-r--r--accel/tcg/user-exec.c1
4 files changed, 0 insertions, 4 deletions
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 2035b2ac0a..dd45e0467b 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -2552,7 +2552,6 @@ void cpu_stq_le_mmu(CPUArchState *env, target_ulong addr, uint64_t val,
glue(glue(glue(cpu_atomic_ ## X, SUFFIX), END), _mmu)
#define ATOMIC_MMU_CLEANUP
-#define ATOMIC_MMU_IDX get_mmuidx(oi)
#include "atomic_common.c.inc"
diff --git a/accel/tcg/hmp.c b/accel/tcg/hmp.c
index d2ea352655..bb67941420 100644
--- a/accel/tcg/hmp.c
+++ b/accel/tcg/hmp.c
@@ -4,7 +4,6 @@
#include "qapi/qapi-commands-machine.h"
#include "exec/exec-all.h"
#include "monitor/monitor.h"
-#include "sysemu/tcg.h"
static void hmp_tcg_register(void)
{
diff --git a/accel/tcg/tcg-accel-ops-icount.c b/accel/tcg/tcg-accel-ops-icount.c
index 6436cd9349..24520ea112 100644
--- a/accel/tcg/tcg-accel-ops-icount.c
+++ b/accel/tcg/tcg-accel-ops-icount.c
@@ -24,7 +24,6 @@
*/
#include "qemu/osdep.h"
-#include "sysemu/tcg.h"
#include "sysemu/replay.h"
#include "sysemu/cpu-timers.h"
#include "qemu/main-loop.h"
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index 8edf0bbaa1..ac57324d4f 100644
--- a/accel/tcg/user-exec.c
+++ b/accel/tcg/user-exec.c
@@ -506,7 +506,6 @@ static void *atomic_mmu_lookup(CPUArchState *env, target_ulong addr,
#define ATOMIC_NAME(X) \
glue(glue(glue(cpu_atomic_ ## X, SUFFIX), END), _mmu)
#define ATOMIC_MMU_CLEANUP do { clear_helper_retaddr(); } while (0)
-#define ATOMIC_MMU_IDX MMU_USER_IDX
#define DATA_SIZE 1
#include "atomic_template.h"