diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2019-01-23 12:49:19 -0800 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2019-01-28 07:04:35 -0800 |
| commit | e77c89fb086a9bf09dd11f72e4cb2093b426f32b (patch) | |
| tree | 24e2ee4bc262c1ee2f2f853dea132d6e99e6326e /accel | |
| parent | 0a9a83d6bf9c42da05e46583e6a2ed11599ea089 (diff) | |
cputlb: Remove static tlb sizing
Now that all tcg backends support TCG_TARGET_IMPLEMENTS_DYN_TLB,
remove the define and the old code.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'accel')
| -rw-r--r-- | accel/tcg/cputlb.c | 21 |
1 files changed, 0 insertions, 21 deletions
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index a3a1614f0e..dad9b7796c 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -74,7 +74,6 @@ QEMU_BUILD_BUG_ON(sizeof(target_ulong) > sizeof(run_on_cpu_data)); QEMU_BUILD_BUG_ON(NB_MMU_MODES > 16); #define ALL_MMUIDX_BITS ((1 << NB_MMU_MODES) - 1) -#if TCG_TARGET_IMPLEMENTS_DYN_TLB static inline size_t sizeof_tlb(CPUArchState *env, uintptr_t mmu_idx) { return env->tlb_mask[mmu_idx] + (1 << CPU_TLB_ENTRY_BITS); @@ -235,26 +234,6 @@ static inline void tlb_n_used_entries_dec(CPUArchState *env, uintptr_t mmu_idx) env->tlb_d[mmu_idx].n_used_entries--; } -#else /* !TCG_TARGET_IMPLEMENTS_DYN_TLB */ - -static inline void tlb_dyn_init(CPUArchState *env) -{ -} - -static inline void tlb_table_flush_by_mmuidx(CPUArchState *env, int mmu_idx) -{ - memset(env->tlb_table[mmu_idx], -1, sizeof(env->tlb_table[0])); -} - -static inline void tlb_n_used_entries_inc(CPUArchState *env, uintptr_t mmu_idx) -{ -} - -static inline void tlb_n_used_entries_dec(CPUArchState *env, uintptr_t mmu_idx) -{ -} -#endif /* TCG_TARGET_IMPLEMENTS_DYN_TLB */ - void tlb_init(CPUState *cpu) { CPUArchState *env = cpu->env_ptr; |