diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2020-01-09 11:23:56 +1100 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2020-01-21 14:21:59 -1000 |
| commit | 3c16304af4241f242eeacae646457b9720aa71db (patch) | |
| tree | 24d849891e60cf478ad3907259e93feb0ab921a2 /accel | |
| parent | 56e89f76fdf0dc8162e28105055570a83a93b15e (diff) | |
cputlb: Initialize tlbs as flushed
There's little point in leaving these data structures half initialized,
and relying on a flush to be done during reset.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'accel')
| -rw-r--r-- | accel/tcg/cputlb.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 360495468e..5a35386224 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -240,6 +240,7 @@ static void tlb_mmu_init(CPUTLBDesc *desc, CPUTLBDescFast *fast, int64_t now) fast->mask = (n_entries - 1) << CPU_TLB_ENTRY_BITS; fast->table = g_new(CPUTLBEntry, n_entries); desc->iotlb = g_new(CPUIOTLBEntry, n_entries); + tlb_mmu_flush_locked(desc, fast); } static inline void tlb_n_used_entries_inc(CPUArchState *env, uintptr_t mmu_idx) @@ -260,8 +261,8 @@ void tlb_init(CPUState *cpu) qemu_spin_init(&env_tlb(env)->c.lock); - /* Ensure that cpu_reset performs a full flush. */ - env_tlb(env)->c.dirty = ALL_MMUIDX_BITS; + /* All tlbs are initialized flushed. */ + env_tlb(env)->c.dirty = 0; for (i = 0; i < NB_MMU_MODES; i++) { tlb_mmu_init(&env_tlb(env)->d[i], &env_tlb(env)->f[i], now); |