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author | Richard Henderson <richard.henderson@linaro.org> | 2020-03-10 22:14:26 -0700 |
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committer | Richard Henderson <richard.henderson@linaro.org> | 2020-03-17 08:41:07 -0700 |
commit | 312b426fea4d6dd322d7472c80010a8ba7a166d2 (patch) | |
tree | 638325efa9778bcff81cf578f671bdc9690a6bc9 /accel/tcg | |
parent | 40c67636f67c2a89745f2e698522fe917326a952 (diff) |
tcg/i386: Bound shift count expanding sari_vec
A given RISU testcase for SVE can produce
tcg-op-vec.c:511: do_shifti: Assertion `i >= 0 && i < (8 << vece)' failed.
because expand_vec_sari gave a shift count of 32 to a MO_32
vector shift.
In 44f1441dbe1, we changed from direct expansion of vector opcodes
to re-use of the tcg expanders. So while the comment correctly notes
that the hw will handle such a shift count, we now have to take our
own sanity checks into account. Which is easy in this particular case.
Fixes: 44f1441dbe1
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'accel/tcg')
0 files changed, 0 insertions, 0 deletions