diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2022-08-12 09:53:53 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2022-10-04 12:13:16 -0700 |
| commit | 8ed558ec0cbcc29ecf490e93c54dd65d276e8e69 (patch) | |
| tree | ff425842023c3c01ba85c1f5feef862ac6159fb0 /accel/tcg/internal.h | |
| parent | fbf59aad178d98afe193fa872a2d880266a75269 (diff) | |
accel/tcg: Introduce TARGET_TB_PCREL
Prepare for targets to be able to produce TBs that can
run in more than one virtual context.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'accel/tcg/internal.h')
| -rw-r--r-- | accel/tcg/internal.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/accel/tcg/internal.h b/accel/tcg/internal.h index a3875a3b5a..dc800fd485 100644 --- a/accel/tcg/internal.h +++ b/accel/tcg/internal.h @@ -21,7 +21,11 @@ void tb_htable_init(void); /* Return the current PC from CPU, which may be cached in TB. */ static inline target_ulong log_pc(CPUState *cpu, const TranslationBlock *tb) { +#if TARGET_TB_PCREL + return cpu->cc->get_pc(cpu); +#else return tb_pc(tb); +#endif } #endif /* ACCEL_TCG_INTERNAL_H */ |