diff options
author | Richard Henderson <richard.henderson@linaro.org> | 2023-05-05 21:40:49 +0100 |
---|---|---|
committer | Michael Tokarev <mjt@tls.msk.ru> | 2023-05-18 21:09:59 +0300 |
commit | 0e262ee8e9c9f7c2adbaceb83920344533e2ed95 (patch) | |
tree | eff623c927250ff13c73e7ef43c776d237024fd1 /accel/tcg/cputlb.c | |
parent | 666e6bbf85c4f2adc100784c8f27f7c4a8e5cc78 (diff) |
accel/tcg: Fix atomic_mmu_lookup for reads
A copy-paste bug had us looking at the victim cache for writes.
Cc: qemu-stable@nongnu.org
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Fixes: 08dff435e2 ("tcg: Probe the proper permissions for atomic ops")
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20230505204049.352469-1-richard.henderson@linaro.org>
(cherry picked from commit 8c313254e61ed47a1bf4a2db714b25cdd94fbcce)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Diffstat (limited to 'accel/tcg/cputlb.c')
-rw-r--r-- | accel/tcg/cputlb.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 6f1c00682b..1160aec626 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1817,7 +1817,7 @@ static void *atomic_mmu_lookup(CPUArchState *env, target_ulong addr, } else /* if (prot & PAGE_READ) */ { tlb_addr = tlbe->addr_read; if (!tlb_hit(tlb_addr, addr)) { - if (!VICTIM_TLB_HIT(addr_write, addr)) { + if (!VICTIM_TLB_HIT(addr_read, addr)) { tlb_fill(env_cpu(env), addr, size, MMU_DATA_LOAD, mmu_idx, retaddr); index = tlb_index(env, mmu_idx, addr); |