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author | David Gibson <david@gibson.dropbear.id.au> | 2017-02-24 16:36:44 +1100 |
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committer | David Gibson <david@gibson.dropbear.id.au> | 2017-03-01 11:23:39 +1100 |
commit | 36778660d7fd0748a6129916e47ecedd67bdb758 (patch) | |
tree | f9c081a54bb5e1ad97f52751283ac247781491a7 /accel.c | |
parent | 7222b94a834e9f6ed99e55eb700cf492d61ba184 (diff) |
target/ppc: Eliminate htab_base and htab_mask variables
CPUPPCState includes fields htab_base and htab_mask which store the base
address (GPA) and size (as a mask) of the guest's hashed page table (HPT).
These are set when the SDR1 register is updated.
Keeping these in sync with the SDR1 is actually a little bit fiddly, and
probably not useful for performance, since keeping them expands the size of
CPUPPCState. It also makes some upcoming changes harder to implement.
This patch removes these fields, in favour of calculating them directly
from the SDR1 contents when necessary.
This does make a change to the behaviour of attempting to write a bad value
(invalid HPT size) to the SDR1 with an mtspr instruction. Previously, the
bad value would be stored in SDR1 and could be retrieved with a later
mfspr, but the HPT size as used by the softmmu would be, clamped to the
allowed values. Now, writing a bad value is treated as a no-op. An error
message is printed in both new and old versions.
I'm not sure which behaviour, if either, matches real hardware. I don't
think it matters that much, since it's pretty clear that if an OS writes
a bad value to SDR1, it's not going to boot.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Diffstat (limited to 'accel.c')
0 files changed, 0 insertions, 0 deletions