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authorDaniel P. Berrangé <berrange@redhat.com>2021-06-07 14:58:40 +0100
committerEduardo Habkost <ehabkost@redhat.com>2021-06-17 14:11:06 -0400
commit38dec0ef76a852d10636a69fc93b21cee9a67715 (patch)
treec3dee5c6c180ee9a8644e16e8505f7f531f233e4 /MAINTAINERS
parentd44df1d73ce04d7f4b8f94cba5f715e2dadc998b (diff)
docs: add a table showing x86-64 ABI compatibility levels
It is useful to know which CPUs satisfy each x86-64 ABI compatibility level, when dealing with guest OS that require something newer than the baseline ABI. These ABI levels are defined in: https://gitlab.com/x86-psABIs/x86-64-ABI/ and supported by GCC, Clang, glibc and more. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Message-Id: <20210607135843.196595-2-berrange@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Diffstat (limited to 'MAINTAINERS')
-rw-r--r--MAINTAINERS2
1 files changed, 1 insertions, 1 deletions
diff --git a/MAINTAINERS b/MAINTAINERS
index 636bf2f536..ccdb81c9f6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -328,7 +328,7 @@ F: tests/tcg/i386/
F: tests/tcg/x86_64/
F: hw/i386/
F: disas/i386.c
-F: docs/system/cpu-models-x86.rst.inc
+F: docs/system/cpu-models-x86*
T: git https://gitlab.com/ehabkost/qemu.git x86-next
Xtensa TCG CPUs