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| author | Peter Maydell <peter.maydell@linaro.org> | 2023-02-16 17:12:18 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2023-02-16 17:12:18 +0000 |
| commit | d8d20b38ec5875b98cfdae52c1f2132540cd65b5 (patch) | |
| tree | 66aede6f7cf63aef48e3408563b3f5deddbe5d44 /MAINTAINERS | |
| parent | 6dffbe36af79e26a4d23f94a9a1c1201de99c261 (diff) | |
| parent | caf01d6a435d9f4a95aeae2f9fc6cb8b889b1fb8 (diff) | |
Merge tag 'pull-target-arm-20230216' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue:
* Some mostly M-profile-related code cleanups
* avocado: Retire the boot_linux.py AArch64 TCG tests
* hw/arm/smmuv3: Add GBPA register
* arm/virt: don't try to spell out the accelerator
* hw/arm: Attach PSPI module to NPCM7XX SoC
* Some cleanup/refactoring patches aiming towards
allowing building Arm targets without CONFIG_TCG
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# gpg: Signature made Thu 16 Feb 2023 17:10:53 GMT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# gpg: aka "Peter Maydell <peter@archaic.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* tag 'pull-target-arm-20230216' of https://git.linaro.org/people/pmaydell/qemu-arm: (30 commits)
tests/qtest: Restrict tpm-tis-devices-{swtpm}-test to CONFIG_TCG
tests/qtest: arm-cpu-features: Match tests to required accelerators
target/arm: Use "max" as default cpu for the virt machine with KVM
tests/avocado: Tag TCG tests with accel:tcg
tests/avocado: Skip tests that require a missing accelerator
target/arm: Move cpregs code out of cpu.h
target/arm: Move PC alignment check
target/arm: wrap call to aarch64_sve_change_el in tcg_enabled()
target/arm: wrap psci call with tcg_enabled
target/arm: rename handle_semihosting to tcg_handle_semihosting
hw/arm/smmu-common: Fix TTB1 handling
hw/arm/smmu-common: Support 64-bit addresses
hw/arm: Attach PSPI module to NPCM7XX SoC
hw/ssi: Add Nuvoton PSPI Module
MAINTAINERS: Add myself to maintainers and remove Havard
arm/virt: don't try to spell out the accelerator
hw/arm: Add missing XLNX_ZYNQMP_ARM -> USB_DWC3 Kconfig dependency
hw/arm/smmuv3: Add GBPA register
tests/avocado: retire the Aarch64 TCG tests from boot_linux.py
target/arm: Declare CPU <-> NVIC helpers in 'hw/intc/armv7m_nvic.h'
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'MAINTAINERS')
| -rw-r--r-- | MAINTAINERS | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index fd54c1f140..21595f0aad 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -807,13 +807,13 @@ F: include/hw/net/mv88w8618_eth.h F: docs/system/arm/musicpal.rst Nuvoton NPCM7xx -M: Havard Skinnemoen <hskinnemoen@google.com> M: Tyrone Ting <kfting@nuvoton.com> +M: Hao Wu <wuhaotsh@google.com> L: qemu-arm@nongnu.org S: Supported -F: hw/*/npcm7xx* -F: include/hw/*/npcm7xx* -F: tests/qtest/npcm7xx* +F: hw/*/npcm* +F: include/hw/*/npcm* +F: tests/qtest/npcm* F: pc-bios/npcm7xx_bootrom.bin F: roms/vbootrom F: docs/system/arm/nuvoton.rst |