diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2020-12-14 18:53:30 +0000 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2020-12-14 18:53:30 +0000 |
commit | aa14de086675280206dbc1849da6f85b75f62f1b (patch) | |
tree | 39640303cb223ea8e72474b27d375cdb14131609 /MAINTAINERS | |
parent | 37f04b71a9cd62ca0f2d24a70fe843619ad45cd0 (diff) | |
parent | 3533ee301c46620fd5699cb97f2d4bd194fe0c24 (diff) |
Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-20201213' into staging
MIPS patches queue
. Allow executing MSA instructions on Loongson-3A4000
. Update Huacai Chen email address
. Various cleanups:
- unused headers removal
- use definitions instead of magic values
- remove dead code
- avoid calling unused code
. Various code movements
CI jobs results:
https://gitlab.com/philmd/qemu/-/pipelines/229120169
https://cirrus-ci.com/build/4857731557359616
# gpg: Signature made Sun 13 Dec 2020 20:18:52 GMT
# gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* remotes/philmd-gitlab/tags/mips-20201213: (26 commits)
target/mips: Use FloatRoundMode enum for FCR31 modes conversion
target/mips: Remove unused headers from fpu_helper.c
target/mips: Inline cpu_mips_realize_env() in mips_cpu_realizefn()
target/mips: Move cpu definitions, reset() and realize() to cpu.c
target/mips: Move mips_cpu_add_definition() from helper.c to cpu.c
target/mips: Extract cpu_supports*/cpu_set* translate.c
hw/mips/malta: Rewrite CP0_MVPConf0 access using deposit()
hw/mips/malta: Do not initialize MT registers if MT ASE absent
target/mips: Do not initialize MT registers if MT ASE absent
target/mips: Introduce ase_mt_available() helper
target/mips: Remove mips_def_t unused argument from mvp_init()
target/mips: Remove unused headers from op_helper.c
target/mips: Remove unused headers from translate.c
hw/mips: Move address translation helpers to target/mips/
target/mips: Introduce cpu_supports_isa() taking CPUMIPSState argument
target/mips: Rename cpu_supports_FEAT() as cpu_type_supports_FEAT()
target/mips: Explicit Release 6 MMU types
target/mips: Allow executing MSA instructions on Loongson-3A4000
target/mips: Also display exception names in user-mode
target/mips: Remove unused headers from cp0_helper.c
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'MAINTAINERS')
-rw-r--r-- | MAINTAINERS | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index 4663c143c3..3a9dcae315 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -389,7 +389,7 @@ S: Maintained F: target/arm/kvm.c MIPS KVM CPUs -M: Huacai Chen <chenhc@lemote.com> +M: Huacai Chen <chenhuacai@kernel.org> S: Odd Fixes F: target/mips/kvm.c @@ -1151,7 +1151,7 @@ F: hw/mips/mipssim.c F: hw/net/mipsnet.c Fuloong 2E -M: Huacai Chen <chenhc@lemote.com> +M: Huacai Chen <chenhuacai@kernel.org> M: Philippe Mathieu-Daudé <f4bug@amsat.org> R: Jiaxun Yang <jiaxun.yang@flygoat.com> S: Odd Fixes @@ -1161,7 +1161,7 @@ F: hw/pci-host/bonito.c F: include/hw/isa/vt82c686.h Loongson-3 virtual platforms -M: Huacai Chen <chenhc@lemote.com> +M: Huacai Chen <chenhuacai@kernel.org> R: Jiaxun Yang <jiaxun.yang@flygoat.com> S: Maintained F: hw/intc/loongson_liointc.c @@ -2876,7 +2876,7 @@ F: disas/i386.c MIPS TCG target M: Philippe Mathieu-Daudé <f4bug@amsat.org> R: Aurelien Jarno <aurelien@aurel32.net> -R: Huacai Chen <chenhc@lemote.com> +R: Huacai Chen <chenhuacai@kernel.org> R: Jiaxun Yang <jiaxun.yang@flygoat.com> R: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com> S: Odd Fixes |