diff options
| author | Fabiano Rosas <farosas@linux.ibm.com> | 2022-02-09 09:08:55 +0100 |
|---|---|---|
| committer | Cédric Le Goater <clg@kaod.org> | 2022-02-09 09:08:55 +0100 |
| commit | db403211f8048c08cc948de8882c1a8c99f021dd (patch) | |
| tree | e83a6a3dfc4249bc90bc090e0a1590697ade636b | |
| parent | 9c9b67fe91a0e5ff3961d85d7d51dce4075a6f08 (diff) | |
target/ppc: booke: Machine Check cleanups
There's no MSR_HV in BookE.
Also remove 40x code.
Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
Message-Id: <20220128224018.1228062-5-farosas@linux.ibm.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
| -rw-r--r-- | target/ppc/excp_helper.c | 29 |
1 files changed, 6 insertions, 23 deletions
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 8a656ace6f..4753b81527 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -819,34 +819,17 @@ static void powerpc_excp_booke(PowerPCCPU *cpu, int excp) cs->halted = 1; cpu_interrupt_exittb(cs); } - if (env->msr_mask & MSR_HVB) { - /* - * ISA specifies HV, but can be delivered to guest with HV - * clear (e.g., see FWNMI in PAPR). - */ - new_msr |= (target_ulong)MSR_HVB; - } /* machine check exceptions don't have ME set */ new_msr &= ~((target_ulong)1 << MSR_ME); - /* XXX: should also have something loaded in DAR / DSISR */ - switch (excp_model) { - case POWERPC_EXCP_40x: - srr0 = SPR_40x_SRR2; - srr1 = SPR_40x_SRR3; - break; - case POWERPC_EXCP_BOOKE: - /* FIXME: choose one or the other based on CPU type */ - srr0 = SPR_BOOKE_MCSRR0; - srr1 = SPR_BOOKE_MCSRR1; + /* FIXME: choose one or the other based on CPU type */ + srr0 = SPR_BOOKE_MCSRR0; + srr1 = SPR_BOOKE_MCSRR1; + + env->spr[SPR_BOOKE_CSRR0] = env->nip; + env->spr[SPR_BOOKE_CSRR1] = msr; - env->spr[SPR_BOOKE_CSRR0] = env->nip; - env->spr[SPR_BOOKE_CSRR1] = msr; - break; - default: - break; - } break; case POWERPC_EXCP_DSI: /* Data storage exception */ trace_ppc_excp_dsi(env->spr[SPR_DSISR], env->spr[SPR_DAR]); |