diff options
| author | Frank Chang <frank.chang@sifive.com> | 2021-12-10 15:56:51 +0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2021-12-20 14:53:31 +1000 |
| commit | 8a4b52575ab1793f5cc86ddd0b5e986799dfc615 (patch) | |
| tree | 4e215398d979c8da2e01ac0c0e8a22de7d233529 | |
| parent | ff679b58e3efed7b03dcd08ea7f9018978a084e5 (diff) | |
target/riscv: rvv-1.0: relax RV_VLEN_MAX to 1024-bits
Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20211210075704.23951-66-frank.chang@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
| -rw-r--r-- | target/riscv/cpu.h | 2 | ||||
| -rw-r--r-- | target/riscv/insn_trans/trans_rvv.c.inc | 4 | ||||
| -rw-r--r-- | target/riscv/vector_helper.c | 2 |
3 files changed, 4 insertions, 4 deletions
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 11a0f41b27..5d93ccdfa7 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -100,7 +100,7 @@ typedef struct CPURISCVState CPURISCVState; #include "pmp.h" #endif -#define RV_VLEN_MAX 256 +#define RV_VLEN_MAX 1024 FIELD(VTYPE, VLMUL, 0, 3) FIELD(VTYPE, VSEW, 3, 3) diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc index 42e9449118..be3f9f1327 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -567,8 +567,8 @@ static bool ldst_us_trans(uint32_t vd, uint32_t rs1, uint32_t data, base = get_gpr(s, rs1, EXT_NONE); /* - * As simd_desc supports at most 256 bytes, and in this implementation, - * the max vector group length is 2048 bytes. So split it into two parts. + * As simd_desc supports at most 2048 bytes, and in this implementation, + * the max vector group length is 4096 bytes. So split it into two parts. * * The first part is vlen in bytes, encoded in maxsz of simd_desc. * The second part is lmul, encoded in data of simd_desc. diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c index a78f36b4b3..e61c873142 100644 --- a/target/riscv/vector_helper.c +++ b/target/riscv/vector_helper.c @@ -124,7 +124,7 @@ static inline int32_t vext_lmul(uint32_t desc) static inline uint32_t vext_max_elems(uint32_t desc, uint32_t esz) { /* - * As simd_desc support at most 256 bytes, the max vlen is 256 bits. + * As simd_desc support at most 2048 bytes, the max vlen is 1024 bits. * so vlen in bytes (vlenb) is encoded as maxsz. */ uint32_t vlenb = simd_maxsz(desc); |