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authorMichael Clark <mjc@sifive.com>2018-03-03 16:23:03 +1300
committerMichael Clark <mjc@sifive.com>2018-05-06 10:39:38 +1200
commit77ff5bba315d4453ae97ff90ba7698fb1ccc077c (patch)
treeff13dc3e199eea5c2a96ef142d6dd1156b0fb33f
parent2a8756ed7d64f8fed6ad50fb062f7118e47c856c (diff)
RISC-V: Make virt board description match spike
This makes 'qemu-system-riscv64 -machine help' output more tidy and consistent. Cc: Sagar Karandikar <sagark@eecs.berkeley.edu> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Michael Clark <mjc@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
-rw-r--r--hw/riscv/virt.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index 2480dad11f..df06fc7207 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -407,7 +407,7 @@ static const TypeInfo riscv_virt_board_device = {
static void riscv_virt_board_machine_init(MachineClass *mc)
{
- mc->desc = "RISC-V VirtIO Board (Privileged spec v1.10)";
+ mc->desc = "RISC-V VirtIO Board (Privileged ISA v1.10)";
mc->init = riscv_virt_board_init;
mc->max_cpus = 8; /* hardcoded limit in BBL */
}