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authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-05-04 13:15:15 +0000
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-05-04 13:15:15 +0000
commit50bf72b384536e961fd6e433dcfa5c4719201e11 (patch)
tree7dfe2a0f8b640b64d0fac0d3e2ec5aaf59db4240
parent1534272158814dbd860d0ab98e76a6fdaa0d5857 (diff)
PPC UIC: Remove interrupt polarity code
(Hollis Blanchard) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4329 c046a42c-6fe2-441c-8c8c-71466251a162
-rw-r--r--hw/ppc4xx_devs.c6
1 files changed, 1 insertions, 5 deletions
diff --git a/hw/ppc4xx_devs.c b/hw/ppc4xx_devs.c
index f79c4c851b..e87172f298 100644
--- a/hw/ppc4xx_devs.c
+++ b/hw/ppc4xx_devs.c
@@ -377,10 +377,7 @@ static void ppcuic_set_irq (void *opaque, int irq_num, int level)
if (irq_num < 0 || irq_num > 31)
return;
sr = uic->uicsr;
- if (!(uic->uicpr & mask)) {
- /* Negatively asserted IRQ */
- level = level == 0 ? 1 : 0;
- }
+
/* Update status register */
if (uic->uictr & mask) {
/* Edge sensitive interrupt */
@@ -479,7 +476,6 @@ static void dcr_write_uic (void *opaque, int dcrn, target_ulong val)
break;
case DCR_UICPR:
uic->uicpr = val;
- ppcuic_trigger_irq(uic);
break;
case DCR_UICTR:
uic->uictr = val;