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authorAurelien Jarno <aurelien@aurel32.net>2011-01-14 20:39:18 +0100
committerAurelien Jarno <aurelien@aurel32.net>2011-01-14 20:39:18 +0100
commit17075f10ff9e2c8bd59ecbf9569421e437707e43 (patch)
tree0efd45cba8832ac6ff5a484189183dd4a305a714
parentaf8c2bde4b4d4111e5bf49417b74069ce8750435 (diff)
target-sh4: add ftrv instruction
Add the ftrv XMTRX,FVn instruction, which computes the 4-row x 4-column matrix XMTRX by the 4-dimensional vector FVn. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
-rw-r--r--target-sh4/helper.h1
-rw-r--r--target-sh4/op_helper.c26
-rw-r--r--target-sh4/translate.c11
3 files changed, 38 insertions, 0 deletions
diff --git a/target-sh4/helper.h b/target-sh4/helper.h
index 544031c3e5..4e595c87f8 100644
--- a/target-sh4/helper.h
+++ b/target-sh4/helper.h
@@ -50,5 +50,6 @@ DEF_HELPER_1(fsqrt_DT, i64, i64)
DEF_HELPER_1(ftrc_FT, i32, i32)
DEF_HELPER_1(ftrc_DT, i32, i64)
DEF_HELPER_2(fipr, void, i32, i32)
+DEF_HELPER_1(ftrv, void, i32)
#include "def-helper.h"
diff --git a/target-sh4/op_helper.c b/target-sh4/op_helper.c
index 030f60d5a2..525b0609cc 100644
--- a/target-sh4/op_helper.c
+++ b/target-sh4/op_helper.c
@@ -802,3 +802,29 @@ void helper_fipr(uint32_t m, uint32_t n)
env->fregs[bank + n + 3] = r;
}
+
+void helper_ftrv(uint32_t n)
+{
+ int bank_matrix, bank_vector;
+ int i, j;
+ float32 r[4];
+ float32 p;
+
+ bank_matrix = (env->sr & FPSCR_FR) ? 0 : 16;
+ bank_vector = (env->sr & FPSCR_FR) ? 16 : 0;
+ set_float_exception_flags(0, &env->fp_status);
+ for (i = 0 ; i < 4 ; i++) {
+ r[i] = float32_zero;
+ for (j = 0 ; j < 4 ; j++) {
+ p = float32_mul(env->fregs[bank_matrix + 4 * j + i],
+ env->fregs[bank_vector + j],
+ &env->fp_status);
+ r[i] = float32_add(r[i], p, &env->fp_status);
+ }
+ }
+ update_fpscr(GETPC());
+
+ for (i = 0 ; i < 4 ; i++) {
+ env->fregs[bank_vector + i] = r[i];
+ }
+}
diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index 557550f8e1..65b6ea413c 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -1871,6 +1871,17 @@ static void _decode_opc(DisasContext * ctx)
return;
}
break;
+ case 0xf0fd: /* ftrv XMTRX,FVn */
+ CHECK_FPU_ENABLED
+ if ((ctx->opcode & 0x0300) == 0x0100 &&
+ (ctx->fpscr & FPSCR_PR) == 0) {
+ TCGv n;
+ n = tcg_const_i32((ctx->opcode >> 18) & 3);
+ gen_helper_ftrv(n);
+ tcg_temp_free(n);
+ return;
+ }
+ break;
}
#if 0
fprintf(stderr, "unknown instruction 0x%04x at pc 0x%08x\n",