diff options
author | Richard Henderson <rth@twiddle.net> | 2014-03-30 15:36:56 -0700 |
---|---|---|
committer | Richard Henderson <rth@twiddle.net> | 2015-02-12 21:21:38 -0800 |
commit | fe700adb3db5b028b504423b946d4ee5200a8f2f (patch) | |
tree | 09389b35e12808f2eb2e2f9754e50842b7b5a799 | |
parent | 0a7df5da986bd7ee0789f2d7b8611f2e8eee5046 (diff) |
tcg: Introduce tcg_op_buf_count and tcg_op_buf_full
The method by which we count the number of ops emitted
is going to change. Abstract that away into some inlines.
Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Richard Henderson <rth@twiddle.net>
-rw-r--r-- | target-alpha/translate.c | 14 | ||||
-rw-r--r-- | target-arm/translate-a64.c | 9 | ||||
-rw-r--r-- | target-arm/translate.c | 9 | ||||
-rw-r--r-- | target-cris/translate.c | 13 | ||||
-rw-r--r-- | target-i386/translate.c | 9 | ||||
-rw-r--r-- | target-lm32/translate.c | 14 | ||||
-rw-r--r-- | target-m68k/translate.c | 9 | ||||
-rw-r--r-- | target-microblaze/translate.c | 20 | ||||
-rw-r--r-- | target-mips/translate.c | 8 | ||||
-rw-r--r-- | target-moxie/translate.c | 8 | ||||
-rw-r--r-- | target-openrisc/translate.c | 13 | ||||
-rw-r--r-- | target-ppc/translate.c | 9 | ||||
-rw-r--r-- | target-s390x/translate.c | 9 | ||||
-rw-r--r-- | target-sh4/translate.c | 8 | ||||
-rw-r--r-- | target-sparc/translate.c | 8 | ||||
-rw-r--r-- | target-tricore/translate.c | 4 | ||||
-rw-r--r-- | target-unicore32/translate.c | 9 | ||||
-rw-r--r-- | target-xtensa/translate.c | 7 | ||||
-rw-r--r-- | tcg/tcg.h | 12 |
19 files changed, 79 insertions, 113 deletions
diff --git a/target-alpha/translate.c b/target-alpha/translate.c index aa04c603af..9c77d46bda 100644 --- a/target-alpha/translate.c +++ b/target-alpha/translate.c @@ -2790,7 +2790,6 @@ static inline void gen_intermediate_code_internal(AlphaCPU *cpu, target_ulong pc_start; target_ulong pc_mask; uint32_t insn; - uint16_t *gen_opc_end; CPUBreakpoint *bp; int j, lj = -1; ExitStatus ret; @@ -2798,7 +2797,6 @@ static inline void gen_intermediate_code_internal(AlphaCPU *cpu, int max_insns; pc_start = tb->pc; - gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE; ctx.tb = tb; ctx.pc = pc_start; @@ -2839,11 +2837,12 @@ static inline void gen_intermediate_code_internal(AlphaCPU *cpu, } } if (search_pc) { - j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; + j = tcg_op_buf_count(); if (lj < j) { lj++; - while (lj < j) + while (lj < j) { tcg_ctx.gen_opc_instr_start[lj++] = 0; + } } tcg_ctx.gen_opc_pc[lj] = ctx.pc; tcg_ctx.gen_opc_instr_start[lj] = 1; @@ -2881,7 +2880,7 @@ static inline void gen_intermediate_code_internal(AlphaCPU *cpu, or exhaust instruction count, stop generation. */ if (ret == NO_EXIT && ((ctx.pc & pc_mask) == 0 - || tcg_ctx.gen_opc_ptr >= gen_opc_end + || tcg_op_buf_full() || num_insns >= max_insns || singlestep || ctx.singlestep_enabled)) { @@ -2914,10 +2913,11 @@ static inline void gen_intermediate_code_internal(AlphaCPU *cpu, gen_tb_end(tb, num_insns); if (search_pc) { - j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; + j = tcg_op_buf_count(); lj++; - while (lj <= j) + while (lj <= j) { tcg_ctx.gen_opc_instr_start[lj++] = 0; + } } else { tb->size = ctx.pc - pc_start; tb->icount = num_insns; diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index 3605eb4d77..2144e622ac 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -10916,7 +10916,6 @@ void gen_intermediate_code_internal_a64(ARMCPU *cpu, CPUARMState *env = &cpu->env; DisasContext dc1, *dc = &dc1; CPUBreakpoint *bp; - uint16_t *gen_opc_end; int j, lj; target_ulong pc_start; target_ulong next_page_start; @@ -10927,8 +10926,6 @@ void gen_intermediate_code_internal_a64(ARMCPU *cpu, dc->tb = tb; - gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE; - dc->is_jmp = DISAS_NEXT; dc->pc = pc_start; dc->singlestep_enabled = cs->singlestep_enabled; @@ -10998,7 +10995,7 @@ void gen_intermediate_code_internal_a64(ARMCPU *cpu, } if (search_pc) { - j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; + j = tcg_op_buf_count(); if (lj < j) { lj++; while (lj < j) { @@ -11048,7 +11045,7 @@ void gen_intermediate_code_internal_a64(ARMCPU *cpu, * ensures prefetch aborts occur at the right place. */ num_insns++; - } while (!dc->is_jmp && tcg_ctx.gen_opc_ptr < gen_opc_end && + } while (!dc->is_jmp && !tcg_op_buf_full() && !cs->singlestep_enabled && !singlestep && !dc->ss_active && @@ -11119,7 +11116,7 @@ done_generating: } #endif if (search_pc) { - j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; + j = tcg_op_buf_count(); lj++; while (lj <= j) { tcg_ctx.gen_opc_instr_start[lj++] = 0; diff --git a/target-arm/translate.c b/target-arm/translate.c index d8ecfc1621..36868ed05f 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -11025,7 +11025,6 @@ static inline void gen_intermediate_code_internal(ARMCPU *cpu, CPUARMState *env = &cpu->env; DisasContext dc1, *dc = &dc1; CPUBreakpoint *bp; - uint16_t *gen_opc_end; int j, lj; target_ulong pc_start; target_ulong next_page_start; @@ -11046,8 +11045,6 @@ static inline void gen_intermediate_code_internal(ARMCPU *cpu, dc->tb = tb; - gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE; - dc->is_jmp = DISAS_NEXT; dc->pc = pc_start; dc->singlestep_enabled = cs->singlestep_enabled; @@ -11182,7 +11179,7 @@ static inline void gen_intermediate_code_internal(ARMCPU *cpu, } } if (search_pc) { - j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; + j = tcg_op_buf_count(); if (lj < j) { lj++; while (lj < j) @@ -11248,7 +11245,7 @@ static inline void gen_intermediate_code_internal(ARMCPU *cpu, * Also stop translation when a page boundary is reached. This * ensures prefetch aborts occur at the right place. */ num_insns ++; - } while (!dc->is_jmp && tcg_ctx.gen_opc_ptr < gen_opc_end && + } while (!dc->is_jmp && !tcg_op_buf_full() && !cs->singlestep_enabled && !singlestep && !dc->ss_active && @@ -11368,7 +11365,7 @@ done_generating: } #endif if (search_pc) { - j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; + j = tcg_op_buf_count(); lj++; while (lj <= j) tcg_ctx.gen_opc_instr_start[lj++] = 0; diff --git a/target-cris/translate.c b/target-cris/translate.c index b5a792cd01..47abcefaae 100644 --- a/target-cris/translate.c +++ b/target-cris/translate.c @@ -3116,7 +3116,6 @@ gen_intermediate_code_internal(CRISCPU *cpu, TranslationBlock *tb, { CPUState *cs = CPU(cpu); CPUCRISState *env = &cpu->env; - uint16_t *gen_opc_end; uint32_t pc_start; unsigned int insn_len; int j, lj; @@ -3142,8 +3141,6 @@ gen_intermediate_code_internal(CRISCPU *cpu, TranslationBlock *tb, dc->cpu = cpu; dc->tb = tb; - gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE; - dc->is_jmp = DISAS_NEXT; dc->ppc = pc_start; dc->pc = pc_start; @@ -3207,7 +3204,7 @@ gen_intermediate_code_internal(CRISCPU *cpu, TranslationBlock *tb, check_breakpoint(env, dc); if (search_pc) { - j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; + j = tcg_op_buf_count(); if (lj < j) { lj++; while (lj < j) { @@ -3291,7 +3288,7 @@ gen_intermediate_code_internal(CRISCPU *cpu, TranslationBlock *tb, break; } } while (!dc->is_jmp && !dc->cpustate_changed - && tcg_ctx.gen_opc_ptr < gen_opc_end + && !tcg_op_buf_full() && !singlestep && (dc->pc < next_page_start) && num_insns < max_insns); @@ -3346,7 +3343,7 @@ gen_intermediate_code_internal(CRISCPU *cpu, TranslationBlock *tb, gen_tb_end(tb, num_insns); if (search_pc) { - j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; + j = tcg_op_buf_count(); lj++; while (lj <= j) { tcg_ctx.gen_opc_instr_start[lj++] = 0; @@ -3361,8 +3358,8 @@ gen_intermediate_code_internal(CRISCPU *cpu, TranslationBlock *tb, if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) { log_target_disas(env, pc_start, dc->pc - pc_start, env->pregs[PR_VR]); - qemu_log("\nisize=%d osize=%td\n", - dc->pc - pc_start, tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf); + qemu_log("\nisize=%d osize=%d\n", + dc->pc - pc_start, tcg_op_buf_count()); } #endif #endif diff --git a/target-i386/translate.c b/target-i386/translate.c index e2e21e471c..094cec059c 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -7913,7 +7913,6 @@ static inline void gen_intermediate_code_internal(X86CPU *cpu, CPUX86State *env = &cpu->env; DisasContext dc1, *dc = &dc1; target_ulong pc_ptr; - uint16_t *gen_opc_end; CPUBreakpoint *bp; int j, lj; uint64_t flags; @@ -7993,8 +7992,6 @@ static inline void gen_intermediate_code_internal(X86CPU *cpu, cpu_ptr1 = tcg_temp_new_ptr(); cpu_cc_srcT = tcg_temp_local_new(); - gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE; - dc->is_jmp = DISAS_NEXT; pc_ptr = pc_start; lj = -1; @@ -8015,7 +8012,7 @@ static inline void gen_intermediate_code_internal(X86CPU *cpu, } } if (search_pc) { - j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; + j = tcg_op_buf_count(); if (lj < j) { lj++; while (lj < j) @@ -8060,7 +8057,7 @@ static inline void gen_intermediate_code_internal(X86CPU *cpu, break; } /* if too long translation, stop generation too */ - if (tcg_ctx.gen_opc_ptr >= gen_opc_end || + if (tcg_op_buf_full() || (pc_ptr - pc_start) >= (TARGET_PAGE_SIZE - 32) || num_insns >= max_insns) { gen_jmp_im(pc_ptr - dc->cs_base); @@ -8080,7 +8077,7 @@ done_generating: /* we don't forget to fill the last values */ if (search_pc) { - j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; + j = tcg_op_buf_count(); lj++; while (lj <= j) tcg_ctx.gen_opc_instr_start[lj++] = 0; diff --git a/target-lm32/translate.c b/target-lm32/translate.c index cd09293a1c..9d087b938d 100644 --- a/target-lm32/translate.c +++ b/target-lm32/translate.c @@ -1062,7 +1062,6 @@ void gen_intermediate_code_internal(LM32CPU *cpu, CPUState *cs = CPU(cpu); CPULM32State *env = &cpu->env; struct DisasContext ctx, *dc = &ctx; - uint16_t *gen_opc_end; uint32_t pc_start; int j, lj; uint32_t next_page_start; @@ -1075,8 +1074,6 @@ void gen_intermediate_code_internal(LM32CPU *cpu, dc->num_watchpoints = cpu->num_watchpoints; dc->tb = tb; - gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE; - dc->is_jmp = DISAS_NEXT; dc->pc = pc_start; dc->singlestep_enabled = cs->singlestep_enabled; @@ -1100,7 +1097,7 @@ void gen_intermediate_code_internal(LM32CPU *cpu, check_breakpoint(env, dc); if (search_pc) { - j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; + j = tcg_op_buf_count(); if (lj < j) { lj++; while (lj < j) { @@ -1124,7 +1121,7 @@ void gen_intermediate_code_internal(LM32CPU *cpu, num_insns++; } while (!dc->is_jmp - && tcg_ctx.gen_opc_ptr < gen_opc_end + && !tcg_op_buf_full() && !cs->singlestep_enabled && !singlestep && (dc->pc < next_page_start) @@ -1160,7 +1157,7 @@ void gen_intermediate_code_internal(LM32CPU *cpu, gen_tb_end(tb, num_insns); if (search_pc) { - j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; + j = tcg_op_buf_count(); lj++; while (lj <= j) { tcg_ctx.gen_opc_instr_start[lj++] = 0; @@ -1174,9 +1171,8 @@ void gen_intermediate_code_internal(LM32CPU *cpu, if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) { qemu_log("\n"); log_target_disas(env, pc_start, dc->pc - pc_start, 0); - qemu_log("\nisize=%d osize=%td\n", - dc->pc - pc_start, tcg_ctx.gen_opc_ptr - - tcg_ctx.gen_opc_buf); + qemu_log("\nisize=%d osize=%d\n", + dc->pc - pc_start, tcg_op_buf_count()); } #endif } diff --git a/target-m68k/translate.c b/target-m68k/translate.c index 7e98a175f7..a39b49515d 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@ -2980,7 +2980,6 @@ gen_intermediate_code_internal(M68kCPU *cpu, TranslationBlock *tb, CPUState *cs = CPU(cpu); CPUM68KState *env = &cpu->env; DisasContext dc1, *dc = &dc1; - uint16_t *gen_opc_end; CPUBreakpoint *bp; int j, lj; target_ulong pc_start; @@ -2993,8 +2992,6 @@ gen_intermediate_code_internal(M68kCPU *cpu, TranslationBlock *tb, dc->tb = tb; - gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE; - dc->env = env; dc->is_jmp = DISAS_NEXT; dc->pc = pc_start; @@ -3026,7 +3023,7 @@ gen_intermediate_code_internal(M68kCPU *cpu, TranslationBlock *tb, break; } if (search_pc) { - j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; + j = tcg_op_buf_count(); if (lj < j) { lj++; while (lj < j) @@ -3041,7 +3038,7 @@ gen_intermediate_code_internal(M68kCPU *cpu, TranslationBlock *tb, dc->insn_pc = dc->pc; disas_m68k_insn(env, dc); num_insns++; - } while (!dc->is_jmp && tcg_ctx.gen_opc_ptr < gen_opc_end && + } while (!dc->is_jmp && !tcg_op_buf_full() && !cs->singlestep_enabled && !singlestep && (pc_offset) < (TARGET_PAGE_SIZE - 32) && @@ -3085,7 +3082,7 @@ gen_intermediate_code_internal(M68kCPU *cpu, TranslationBlock *tb, } #endif if (search_pc) { - j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; + j = tcg_op_buf_count(); lj++; while (lj <= j) tcg_ctx.gen_opc_instr_start[lj++] = 0; diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c index 437a069c24..5ff3833010 100644 --- a/target-microblaze/translate.c +++ b/target-microblaze/translate.c @@ -1673,7 +1673,6 @@ gen_intermediate_code_internal(MicroBlazeCPU *cpu, TranslationBlock *tb, { CPUState *cs = CPU(cpu); CPUMBState *env = &cpu->env; - uint16_t *gen_opc_end; uint32_t pc_start; int j, lj; struct DisasContext ctx; @@ -1688,8 +1687,6 @@ gen_intermediate_code_internal(MicroBlazeCPU *cpu, TranslationBlock *tb, dc->tb = tb; org_flags = dc->synced_flags = dc->tb_flags = tb->flags; - gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE; - dc->is_jmp = DISAS_NEXT; dc->jmp = 0; dc->delayed_branch = !!(dc->tb_flags & D_FLAG); @@ -1732,7 +1729,7 @@ gen_intermediate_code_internal(MicroBlazeCPU *cpu, TranslationBlock *tb, check_breakpoint(env, dc); if (search_pc) { - j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; + j = tcg_op_buf_count(); if (lj < j) { lj++; while (lj < j) @@ -1795,10 +1792,10 @@ gen_intermediate_code_internal(MicroBlazeCPU *cpu, TranslationBlock *tb, break; } } while (!dc->is_jmp && !dc->cpustate_changed - && tcg_ctx.gen_opc_ptr < gen_opc_end - && !singlestep - && (dc->pc < next_page_start) - && num_insns < max_insns); + && !tcg_op_buf_full() + && !singlestep + && (dc->pc < next_page_start) + && num_insns < max_insns); npc = dc->pc; if (dc->jmp == JMP_DIRECT || dc->jmp == JMP_DIRECT_CC) { @@ -1848,7 +1845,7 @@ gen_intermediate_code_internal(MicroBlazeCPU *cpu, TranslationBlock *tb, gen_tb_end(tb, num_insns); if (search_pc) { - j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; + j = tcg_op_buf_count(); lj++; while (lj <= j) tcg_ctx.gen_opc_instr_start[lj++] = 0; @@ -1864,9 +1861,8 @@ gen_intermediate_code_internal(MicroBlazeCPU *cpu, TranslationBlock *tb, #if DISAS_GNU log_target_disas(env, pc_start, dc->pc - pc_start, 0); #endif - qemu_log("\nisize=%d osize=%td\n", - dc->pc - pc_start, tcg_ctx.gen_opc_ptr - - tcg_ctx.gen_opc_buf); + qemu_log("\nisize=%d osize=%d\n", + dc->pc - pc_start, tcg_op_buf_count()); } #endif #endif diff --git a/target-mips/translate.c b/target-mips/translate.c index f7ada9f8e3..881e7fb6d6 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -19095,7 +19095,6 @@ gen_intermediate_code_internal(MIPSCPU *cpu, TranslationBlock *tb, CPUMIPSState *env = &cpu->env; DisasContext ctx; target_ulong pc_start; - uint16_t *gen_opc_end; CPUBreakpoint *bp; int j, lj = -1; int num_insns; @@ -19107,7 +19106,6 @@ gen_intermediate_code_internal(MIPSCPU *cpu, TranslationBlock *tb, qemu_log("search pc %d\n", search_pc); pc_start = tb->pc; - gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE; ctx.pc = pc_start; ctx.saved_pc = -1; ctx.singlestep_enabled = cs->singlestep_enabled; @@ -19151,7 +19149,7 @@ gen_intermediate_code_internal(MIPSCPU *cpu, TranslationBlock *tb, } if (search_pc) { - j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; + j = tcg_op_buf_count(); if (lj < j) { lj++; while (lj < j) @@ -19209,7 +19207,7 @@ gen_intermediate_code_internal(MIPSCPU *cpu, TranslationBlock *tb, if ((ctx.pc & (TARGET_PAGE_SIZE - 1)) == 0) break; - if (tcg_ctx.gen_opc_ptr >= gen_opc_end) { + if (tcg_op_buf_full()) { break; } @@ -19246,7 +19244,7 @@ done_generating: gen_tb_end(tb, num_insns); if (search_pc) { - j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; + j = tcg_op_buf_count(); lj++; while (lj <= j) tcg_ctx.gen_opc_instr_start[lj++] = 0; diff --git a/target-moxie/translate.c b/target-moxie/translate.c index 121ebf6783..c416eca44b 100644 --- a/target-moxie/translate.c +++ b/target-moxie/translate.c @@ -827,14 +827,12 @@ gen_intermediate_code_internal(MoxieCPU *cpu, TranslationBlock *tb, CPUState *cs = CPU(cpu); DisasContext ctx; target_ulong pc_start; - uint16_t *gen_opc_end; CPUBreakpoint *bp; int j, lj = -1; CPUMoxieState *env = &cpu->env; int num_insns; pc_start = tb->pc; - gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE; ctx.pc = pc_start; ctx.saved_pc = -1; ctx.tb = tb; @@ -857,7 +855,7 @@ gen_intermediate_code_internal(MoxieCPU *cpu, TranslationBlock *tb, } if (search_pc) { - j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; + j = tcg_op_buf_count(); if (lj < j) { lj++; while (lj < j) { @@ -879,7 +877,7 @@ gen_intermediate_code_internal(MoxieCPU *cpu, TranslationBlock *tb, if ((ctx.pc & (TARGET_PAGE_SIZE - 1)) == 0) { break; } - } while (ctx.bstate == BS_NONE && tcg_ctx.gen_opc_ptr < gen_opc_end); + } while (ctx.bstate == BS_NONE && !tcg_op_buf_full()); if (cs->singlestep_enabled) { tcg_gen_movi_tl(cpu_pc, ctx.pc); @@ -902,7 +900,7 @@ gen_intermediate_code_internal(MoxieCPU *cpu, TranslationBlock *tb, gen_tb_end(tb, num_insns); if (search_pc) { - j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; + j = tcg_op_buf_count(); lj++; while (lj <= j) { tcg_ctx.gen_opc_instr_start[lj++] = 0; diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c index 91505127fe..6ef447b77b 100644 --- a/target-openrisc/translate.c +++ b/target-openrisc/translate.c @@ -1642,7 +1642,6 @@ static inline void gen_intermediate_code_internal(OpenRISCCPU *cpu, { CPUState *cs = CPU(cpu); struct DisasContext ctx, *dc = &ctx; - uint16_t *gen_opc_end; uint32_t pc_start; int j, k; uint32_t next_page_start; @@ -1652,7 +1651,6 @@ static inline void gen_intermediate_code_internal(OpenRISCCPU *cpu, pc_start = tb->pc; dc->tb = tb; - gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE; dc->is_jmp = DISAS_NEXT; dc->ppc = pc_start; dc->pc = pc_start; @@ -1680,7 +1678,7 @@ static inline void gen_intermediate_code_internal(OpenRISCCPU *cpu, do { check_breakpoint(cpu, dc); if (search_pc) { - j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; + j = tcg_op_buf_count(); if (k < j) { k++; while (k < j) { @@ -1721,7 +1719,7 @@ static inline void gen_intermediate_code_internal(OpenRISCCPU *cpu, } } } while (!dc->is_jmp - && tcg_ctx.gen_opc_ptr < gen_opc_end + && !tcg_op_buf_full() && !cs->singlestep_enabled && !singlestep && (dc->pc < next_page_start) @@ -1761,7 +1759,7 @@ static inline void gen_intermediate_code_internal(OpenRISCCPU *cpu, gen_tb_end(tb, num_insns); if (search_pc) { - j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; + j = tcg_op_buf_count(); k++; while (k <= j) { tcg_ctx.gen_opc_instr_start[k++] = 0; @@ -1775,9 +1773,8 @@ static inline void gen_intermediate_code_internal(OpenRISCCPU *cpu, if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) { qemu_log("\n"); log_target_disas(&cpu->env, pc_start, dc->pc - pc_start, 0); - qemu_log("\nisize=%d osize=%td\n", - dc->pc - pc_start, tcg_ctx.gen_opc_ptr - - tcg_ctx.gen_opc_buf); + qemu_log("\nisize=%d osize=%d\n", + dc->pc - pc_start, tcg_op_buf_count()); } #endif } diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 955dfb35e2..88c18e37b3 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -11415,14 +11415,12 @@ static inline void gen_intermediate_code_internal(PowerPCCPU *cpu, DisasContext ctx, *ctxp = &ctx; opc_handler_t **table, *handler; target_ulong pc_start; - uint16_t *gen_opc_end; CPUBreakpoint *bp; int j, lj = -1; int num_insns; int max_insns; pc_start = tb->pc; - gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE; ctx.nip = pc_start; ctx.tb = tb; ctx.exception = POWERPC_EXCP_NONE; @@ -11481,8 +11479,7 @@ static inline void gen_intermediate_code_internal(PowerPCCPU *cpu, gen_tb_start(tb); tcg_clear_temp_count(); /* Set env in case of segfault during code fetch */ - while (ctx.exception == POWERPC_EXCP_NONE - && tcg_ctx.gen_opc_ptr < gen_opc_end) { + while (ctx.exception == POWERPC_EXCP_NONE && !tcg_op_buf_full()) { if (unlikely(!QTAILQ_EMPTY(&cs->breakpoints))) { QTAILQ_FOREACH(bp, &cs->breakpoints, entry) { if (bp->pc == ctx.nip) { @@ -11492,7 +11489,7 @@ static inline void gen_intermediate_code_internal(PowerPCCPU *cpu, } } if (unlikely(search_pc)) { - j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; + j = tcg_op_buf_count(); if (lj < j) { lj++; while (lj < j) @@ -11600,7 +11597,7 @@ static inline void gen_intermediate_code_internal(PowerPCCPU *cpu, gen_tb_end(tb, num_insns); if (unlikely(search_pc)) { - j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; + j = tcg_op_buf_count(); lj++; while (lj <= j) tcg_ctx.gen_opc_instr_start[lj++] = 0; diff --git a/target-s390x/translate.c b/target-s390x/translate.c index 47414aaa2d..c73ea61b16 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -4832,7 +4832,6 @@ static inline void gen_intermediate_code_internal(S390CPU *cpu, DisasContext dc; target_ulong pc_start; uint64_t next_page_start; - uint16_t *gen_opc_end; int j, lj = -1; int num_insns, max_insns; CPUBreakpoint *bp; @@ -4851,8 +4850,6 @@ static inline void gen_intermediate_code_internal(S390CPU *cpu, dc.cc_op = CC_OP_DYNAMIC; do_debug = dc.singlestep_enabled = cs->singlestep_enabled; - gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE; - next_page_start = (pc_start & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE; num_insns = 0; @@ -4865,7 +4862,7 @@ static inline void gen_intermediate_code_internal(S390CPU *cpu, do { if (search_pc) { - j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; + j = tcg_op_buf_count(); if (lj < j) { lj++; while (lj < j) { @@ -4903,7 +4900,7 @@ static inline void gen_intermediate_code_internal(S390CPU *cpu, or exhaust instruction count, stop generation. */ if (status == NO_EXIT && (dc.pc >= next_page_start - || tcg_ctx.gen_opc_ptr >= gen_opc_end + || tcg_op_buf_full() || num_insns >= max_insns || singlestep || cs->singlestep_enabled)) { @@ -4940,7 +4937,7 @@ static inline void gen_intermediate_code_internal(S390CPU *cpu, gen_tb_end(tb, num_insns); if (search_pc) { - j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; + j = tcg_op_buf_count(); lj++; while (lj <= j) { tcg_ctx.gen_opc_instr_start[lj++] = 0; diff --git a/target-sh4/translate.c b/target-sh4/translate.c index 82ec6fd2d3..4c95ac7a83 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -1865,14 +1865,12 @@ gen_intermediate_code_internal(SuperHCPU *cpu, TranslationBlock *tb, CPUSH4State *env = &cpu->env; DisasContext ctx; target_ulong pc_start; - static uint16_t *gen_opc_end; CPUBreakpoint *bp; int i, ii; int num_insns; int max_insns; pc_start = tb->pc; - gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE; ctx.pc = pc_start; ctx.flags = (uint32_t)tb->flags; ctx.bstate = BS_NONE; @@ -1891,7 +1889,7 @@ gen_intermediate_code_internal(SuperHCPU *cpu, TranslationBlock *tb, if (max_insns == 0) max_insns = CF_COUNT_MASK; gen_tb_start(tb); - while (ctx.bstate == BS_NONE && tcg_ctx.gen_opc_ptr < gen_opc_end) { + while (ctx.bstate == BS_NONE && !tcg_op_buf_full()) { if (unlikely(!QTAILQ_EMPTY(&cs->breakpoints))) { QTAILQ_FOREACH(bp, &cs->breakpoints, entry) { if (ctx.pc == bp->pc) { @@ -1904,7 +1902,7 @@ gen_intermediate_code_internal(SuperHCPU *cpu, TranslationBlock *tb, } } if (search_pc) { - i = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; + i = tcg_op_buf_count(); if (ii < i) { ii++; while (ii < i) @@ -1964,7 +1962,7 @@ gen_intermediate_code_internal(SuperHCPU *cpu, TranslationBlock *tb, gen_tb_end(tb, num_insns); if (search_pc) { - i = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; + i = tcg_op_buf_count(); ii++; while (ii <= i) tcg_ctx.gen_opc_instr_start[ii++] = 0; diff --git a/target-sparc/translate.c b/target-sparc/translate.c index 00015be117..bd53950078 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -5223,7 +5223,6 @@ static inline void gen_intermediate_code_internal(SPARCCPU *cpu, CPUState *cs = CPU(cpu); CPUSPARCState *env = &cpu->env; target_ulong pc_start, last_pc; - uint16_t *gen_opc_end; DisasContext dc1, *dc = &dc1; CPUBreakpoint *bp; int j, lj = -1; @@ -5243,7 +5242,6 @@ static inline void gen_intermediate_code_internal(SPARCCPU *cpu, dc->fpu_enabled = tb_fpu_enabled(tb->flags); dc->address_mask_32bit = tb_am_enabled(tb->flags); dc->singlestep = (cs->singlestep_enabled || singlestep); - gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE; num_insns = 0; max_insns = tb->cflags & CF_COUNT_MASK; @@ -5265,7 +5263,7 @@ static inline void gen_intermediate_code_internal(SPARCCPU *cpu, } if (spc) { qemu_log("Search PC...\n"); - j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; + j = tcg_op_buf_count(); if (lj < j) { lj++; while (lj < j) @@ -5298,7 +5296,7 @@ static inline void gen_intermediate_code_internal(SPARCCPU *cpu, if (dc->singlestep) { break; } - } while ((tcg_ctx.gen_opc_ptr < gen_opc_end) && + } while (!tcg_op_buf_full() && (dc->pc - pc_start) < (TARGET_PAGE_SIZE - 32) && num_insns < max_insns); @@ -5322,7 +5320,7 @@ static inline void gen_intermediate_code_internal(SPARCCPU *cpu, gen_tb_end(tb, num_insns); if (spc) { - j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; + j = tcg_op_buf_count(); lj++; while (lj <= j) tcg_ctx.gen_opc_instr_start[lj++] = 0; diff --git a/target-tricore/translate.c b/target-tricore/translate.c index 4fb13dd704..996435dbd0 100644 --- a/target-tricore/translate.c +++ b/target-tricore/translate.c @@ -5500,7 +5500,6 @@ gen_intermediate_code_internal(TriCoreCPU *cpu, struct TranslationBlock *tb, DisasContext ctx; target_ulong pc_start; int num_insns; - uint16_t *gen_opc_end; if (search_pc) { qemu_log("search pc %d\n", search_pc); @@ -5508,7 +5507,6 @@ gen_intermediate_code_internal(TriCoreCPU *cpu, struct TranslationBlock *tb, num_insns = 0; pc_start = tb->pc; - gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE; ctx.pc = pc_start; ctx.saved_pc = -1; ctx.tb = tb; @@ -5524,7 +5522,7 @@ gen_intermediate_code_internal(TriCoreCPU *cpu, struct TranslationBlock *tb, num_insns++; - if (tcg_ctx.gen_opc_ptr >= gen_opc_end) { + if (tcg_op_buf_full()) { gen_save_pc(ctx.next_pc); tcg_gen_exit_tb(0); break; diff --git a/target-unicore32/translate.c b/target-unicore32/translate.c index 2397a25646..db453ef95c 100644 --- a/target-unicore32/translate.c +++ b/target-unicore32/translate.c @@ -1877,7 +1877,6 @@ static inline void gen_intermediate_code_internal(UniCore32CPU *cpu, CPUUniCore32State *env = &cpu->env; DisasContext dc1, *dc = &dc1; CPUBreakpoint *bp; - uint16_t *gen_opc_end; int j, lj; target_ulong pc_start; uint32_t next_page_start; @@ -1891,8 +1890,6 @@ static inline void gen_intermediate_code_internal(UniCore32CPU *cpu, dc->tb = tb; - gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE; - dc->is_jmp = DISAS_NEXT; dc->pc = pc_start; dc->singlestep_enabled = cs->singlestep_enabled; @@ -1933,7 +1930,7 @@ static inline void gen_intermediate_code_internal(UniCore32CPU *cpu, } } if (search_pc) { - j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; + j = tcg_op_buf_count(); if (lj < j) { lj++; while (lj < j) { @@ -1965,7 +1962,7 @@ static inline void gen_intermediate_code_internal(UniCore32CPU *cpu, * Also stop translation when a page boundary is reached. This * ensures prefetch aborts occur at the right place. */ num_insns++; - } while (!dc->is_jmp && tcg_ctx.gen_opc_ptr < gen_opc_end && + } while (!dc->is_jmp && !tcg_op_buf_full() && !cs->singlestep_enabled && !singlestep && dc->pc < next_page_start && @@ -2047,7 +2044,7 @@ done_generating: } #endif if (search_pc) { - j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; + j = tcg_op_buf_count(); lj++; while (lj <= j) { tcg_ctx.gen_opc_instr_start[lj++] = 0; diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c index 2024ba90be..f112e2ac44 100644 --- a/target-xtensa/translate.c +++ b/target-xtensa/translate.c @@ -3021,7 +3021,6 @@ void gen_intermediate_code_internal(XtensaCPU *cpu, DisasContext dc; int insn_count = 0; int j, lj = -1; - uint16_t *gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE; int max_insns = tb->cflags & CF_COUNT_MASK; uint32_t pc_start = tb->pc; uint32_t next_page_start = @@ -3065,7 +3064,7 @@ void gen_intermediate_code_internal(XtensaCPU *cpu, check_breakpoint(env, &dc); if (search_pc) { - j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; + j = tcg_op_buf_count(); if (lj < j) { lj++; while (lj < j) { @@ -3117,7 +3116,7 @@ void gen_intermediate_code_internal(XtensaCPU *cpu, insn_count < max_insns && dc.pc < next_page_start && dc.pc + xtensa_insn_len(env, &dc) <= next_page_start && - tcg_ctx.gen_opc_ptr < gen_opc_end); + !tcg_op_buf_full()); reset_litbase(&dc); reset_sar_tracker(&dc); @@ -3143,7 +3142,7 @@ void gen_intermediate_code_internal(XtensaCPU *cpu, } #endif if (search_pc) { - j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; + j = tcg_op_buf_count(); memset(tcg_ctx.gen_opc_instr_start + lj + 1, 0, (j - lj) * sizeof(tcg_ctx.gen_opc_instr_start[0])); } else { @@ -537,6 +537,18 @@ struct TCGContext { extern TCGContext tcg_ctx; +/* The number of opcodes emitted so far. */ +static inline int tcg_op_buf_count(void) +{ + return tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; +} + +/* Test for whether to terminate the TB for using too many opcodes. */ +static inline bool tcg_op_buf_full(void) +{ + return tcg_op_buf_count() >= OPC_MAX_SIZE; +} + /* pool based memory allocation */ void *tcg_malloc_internal(TCGContext *s, int size); |