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authorPeter Maydell <peter.maydell@linaro.org>2021-07-02 11:40:12 +0100
committerPeter Maydell <peter.maydell@linaro.org>2021-07-09 16:09:12 +0100
commit455736df2cfd3a980782986d597132776d630823 (patch)
tree7208c424683519bdb1062cb386d53fd4efb91db5
parent74d359b52db760f8818476f4fbaab0ffab76a8ef (diff)
hw/gpio/pl061: Document the interface of this device
Add a comment documenting the "QEMU interface" of this device: which MMIO regions, IRQ lines, GPIO lines, etc it exposes. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
-rw-r--r--hw/gpio/pl061.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/hw/gpio/pl061.c b/hw/gpio/pl061.c
index 42f6e6c489..a3c1386221 100644
--- a/hw/gpio/pl061.c
+++ b/hw/gpio/pl061.c
@@ -6,6 +6,13 @@
* Written by Paul Brook
*
* This code is licensed under the GPL.
+ *
+ * QEMU interface:
+ * + sysbus MMIO region 0: the device registers
+ * + sysbus IRQ: the GPIOINTR interrupt line
+ * + unnamed GPIO inputs 0..7: inputs to connect to the emulated GPIO lines
+ * + unnamed GPIO outputs 0..7: the emulated GPIO lines, considered as
+ * outputs
*/
#include "qemu/osdep.h"