diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2016-06-27 12:54:54 +0100 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2016-06-27 12:54:54 +0100 |
commit | aa8151b7df6b1c521b46583badfec504715018c5 (patch) | |
tree | 4fc965744b6c791ad674411139c825d1f2695754 | |
parent | 4b86bac21c15cd04cf333423c8c256e4dc4dc925 (diff) | |
parent | 27393c33d806a4a5c3bc85342e4c1985a666681b (diff) |
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.7-20160627' into staging
ppc patch queue for 2016-06-27
Small queue this time. Main reason for sending it is the pair of
patches to fix up the new cpu hotplug model used on Power to what
should be an actually usable state. There's also a small BookE bugfix
and a XICS trivial cleanup.
# gpg: Signature made Mon 27 Jun 2016 06:28:37 BST
# gpg: using RSA key 0x6C38CACA20D9B392
# gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>"
# gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>"
# gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>"
# gpg: WARNING: This key is not certified with sufficiently trusted signatures!
# gpg: It is not certain that the signature belongs to the owner.
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392
* remotes/dgibson/tags/ppc-for-2.7-20160627:
qapi: keep names in 'CpuInstanceProperties' in sync with struct CPUCore
qapi: Report support for -device cpu hotplug in query-machines
ppc/xics: Remove unused xics_set_irq_type()
target-ppc: ppce500_spin.c uses SPR_PIR, should use SPR_BOOKE_PIR
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r-- | hmp.c | 16 | ||||
-rw-r--r-- | hw/intc/xics.c | 11 | ||||
-rw-r--r-- | hw/ppc/ppce500_spin.c | 2 | ||||
-rw-r--r-- | hw/ppc/spapr.c | 4 | ||||
-rw-r--r-- | include/hw/cpu/core.h | 3 | ||||
-rw-r--r-- | include/hw/ppc/xics.h | 1 | ||||
-rw-r--r-- | qapi-schema.json | 24 | ||||
-rw-r--r-- | vl.c | 1 |
8 files changed, 29 insertions, 33 deletions
@@ -2457,17 +2457,17 @@ void hmp_hotpluggable_cpus(Monitor *mon, const QDict *qdict) c = l->value->props; monitor_printf(mon, " CPUInstance Properties:\n"); - if (c->has_node) { - monitor_printf(mon, " node: \"%" PRIu64 "\"\n", c->node); + if (c->has_node_id) { + monitor_printf(mon, " node-id: \"%" PRIu64 "\"\n", c->node_id); } - if (c->has_socket) { - monitor_printf(mon, " socket: \"%" PRIu64 "\"\n", c->socket); + if (c->has_socket_id) { + monitor_printf(mon, " socket-id: \"%" PRIu64 "\"\n", c->socket_id); } - if (c->has_core) { - monitor_printf(mon, " core: \"%" PRIu64 "\"\n", c->core); + if (c->has_core_id) { + monitor_printf(mon, " core-id: \"%" PRIu64 "\"\n", c->core_id); } - if (c->has_thread) { - monitor_printf(mon, " thread: \"%" PRIu64 "\"\n", c->thread); + if (c->has_thread_id) { + monitor_printf(mon, " thread-id: \"%" PRIu64 "\"\n", c->thread_id); } l = l->next; diff --git a/hw/intc/xics.c b/hw/intc/xics.c index cce7f3d112..2e83d41b14 100644 --- a/hw/intc/xics.c +++ b/hw/intc/xics.c @@ -694,17 +694,6 @@ static void ics_set_irq_type(ICSState *ics, int srcno, bool lsi) lsi ? XICS_FLAGS_IRQ_LSI : XICS_FLAGS_IRQ_MSI; } -void xics_set_irq_type(XICSState *icp, int irq, bool lsi) -{ - int src = xics_find_source(icp, irq); - ICSState *ics; - - assert(src >= 0); - - ics = &icp->ics[src]; - ics_set_irq_type(ics, irq - ics->offset, lsi); -} - #define ICS_IRQ_FREE(ics, srcno) \ (!((ics)->irqs[(srcno)].flags & (XICS_FLAGS_IRQ_MASK))) diff --git a/hw/ppc/ppce500_spin.c b/hw/ppc/ppce500_spin.c index 76bd78bfd7..225177b5af 100644 --- a/hw/ppc/ppce500_spin.c +++ b/hw/ppc/ppce500_spin.c @@ -104,7 +104,7 @@ static void spin_kick(void *data) hwaddr map_start; cpu_synchronize_state(cpu); - stl_p(&curspin->pir, env->spr[SPR_PIR]); + stl_p(&curspin->pir, env->spr[SPR_BOOKE_PIR]); env->nip = ldq_p(&curspin->addr) & (map_size - 1); env->gpr[3] = ldq_p(&curspin->r3); env->gpr[4] = 0; diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 778fa255a9..0b6bb9ce1a 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -2367,8 +2367,8 @@ static HotpluggableCPUList *spapr_query_hotpluggable_cpus(MachineState *machine) cpu_item->type = spapr_get_cpu_core_type(machine->cpu_model); cpu_item->vcpus_count = smp_threads; - cpu_props->has_core = true; - cpu_props->core = i * smt; + cpu_props->has_core_id = true; + cpu_props->core_id = i * smt; /* TODO: add 'has_node/node' here to describe to which node core belongs */ diff --git a/include/hw/cpu/core.h b/include/hw/cpu/core.h index 4540a7d34f..79ac79c29c 100644 --- a/include/hw/cpu/core.h +++ b/include/hw/cpu/core.h @@ -26,6 +26,9 @@ typedef struct CPUCore { int nr_threads; } CPUCore; +/* Note: topology field names need to be kept in sync with + * 'CpuInstanceProperties' */ + #define CPU_CORE_PROP_CORE_ID "core-id" #endif diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h index 9091054003..6925677197 100644 --- a/include/hw/ppc/xics.h +++ b/include/hw/ppc/xics.h @@ -160,7 +160,6 @@ struct ICSIRQState { #define XICS_IRQS 1024 qemu_irq xics_get_qirq(XICSState *icp, int irq); -void xics_set_irq_type(XICSState *icp, int irq, bool lsi); int xics_alloc(XICSState *icp, int src, int irq_hint, bool lsi, Error **errp); int xics_alloc_block(XICSState *icp, int src, int num, bool lsi, bool align, Error **errp); diff --git a/qapi-schema.json b/qapi-schema.json index 84b6708125..ba3bf14749 100644 --- a/qapi-schema.json +++ b/qapi-schema.json @@ -2986,11 +2986,14 @@ # @cpu-max: maximum number of CPUs supported by the machine type # (since 1.5.0) # +# @hotpluggable-cpus: cpu hotplug via -device is supported (since 2.7.0) +# # Since: 1.2.0 ## { 'struct': 'MachineInfo', 'data': { 'name': 'str', '*alias': 'str', - '*is-default': 'bool', 'cpu-max': 'int' } } + '*is-default': 'bool', 'cpu-max': 'int', + 'hotpluggable-cpus': 'bool'} } ## # @query-machines: @@ -4265,20 +4268,21 @@ # Note: currently there are 4 properties that could be present # but management should be prepared to pass through other # properties with device_add command to allow for future -# interface extension. +# interface extension. This also requires the filed names to be kept in +# sync with the properties passed to -device/device_add. # -# @node: #optional NUMA node ID the CPU belongs to -# @socket: #optional socket number within node/board the CPU belongs to -# @core: #optional core number within socket the CPU belongs to -# @thread: #optional thread number within core the CPU belongs to +# @node-id: #optional NUMA node ID the CPU belongs to +# @socket-id: #optional socket number within node/board the CPU belongs to +# @core-id: #optional core number within socket the CPU belongs to +# @thread-id: #optional thread number within core the CPU belongs to # # Since: 2.7 ## { 'struct': 'CpuInstanceProperties', - 'data': { '*node': 'int', - '*socket': 'int', - '*core': 'int', - '*thread': 'int' + 'data': { '*node-id': 'int', + '*socket-id': 'int', + '*core-id': 'int', + '*thread-id': 'int' } } @@ -1524,6 +1524,7 @@ MachineInfoList *qmp_query_machines(Error **errp) info->name = g_strdup(mc->name); info->cpu_max = !mc->max_cpus ? 1 : mc->max_cpus; + info->hotpluggable_cpus = !!mc->query_hotpluggable_cpus; entry = g_malloc0(sizeof(*entry)); entry->value = info; |