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authorRichard Henderson <richard.henderson@linaro.org>2023-08-31 09:45:14 +0100
committerPeter Maydell <peter.maydell@linaro.org>2023-08-31 09:45:14 +0100
commitae4acc696f34bf0cb8865521c16ff378b19915b3 (patch)
tree6f92760b2ec3d6e20891761dee0299775c74ed1b
parent156618d9ea67f2f2e31d9dedd97f2dcccbe6808c (diff)
target/arm: Reduce dcz_blocksize to uint8_t
This value is only 4 bits wide. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20230811214031.171020-2-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--target/arm/cpu.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index cdf8600b96..a1e604366b 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1074,7 +1074,8 @@ struct ArchCPU {
bool prop_lpa2;
/* DCZ blocksize, in log_2(words), ie low 4 bits of DCZID_EL0 */
- uint32_t dcz_blocksize;
+ uint8_t dcz_blocksize;
+
uint64_t rvbar_prop; /* Property/input signals. */
/* Configurable aspects of GIC cpu interface (which is part of the CPU) */