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| author | Stefan Hajnoczi <stefanha@redhat.com> | 2023-12-21 19:44:19 -0500 |
|---|---|---|
| committer | Stefan Hajnoczi <stefanha@redhat.com> | 2023-12-21 19:44:19 -0500 |
| commit | 80f1709aa0eb4de09b4240563463f991a5b9d855 (patch) | |
| tree | 69daa7600db38639015c0cc98c66ba5c9a549973 | |
| parent | 6370d13c62c300826f8eb80e4ed9d2e67bad3fa7 (diff) | |
| parent | be45144bee708d3b84c3c474a4d4aeb7e5c4733a (diff) | |
Merge tag 'pull-loongarch-20231221' of https://gitlab.com/gaosong/qemu into staging
pull-loongarch-20231221
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# gpg: Signature made Thu 21 Dec 2023 03:09:33 EST
# gpg: using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF
# gpg: Good signature from "Song Gao <m17746591750@163.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C 6C2C 40A2 FFF2 3926 3EDF
* tag 'pull-loongarch-20231221' of https://gitlab.com/gaosong/qemu:
target/loongarch: Add timer information dump support
hw/loongarch/virt: Align high memory base address with super page size
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
| -rw-r--r-- | include/hw/loongarch/virt.h | 2 | ||||
| -rw-r--r-- | target/loongarch/cpu.c | 2 |
2 files changed, 3 insertions, 1 deletions
diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h index 674f4655e0..db0831b471 100644 --- a/include/hw/loongarch/virt.h +++ b/include/hw/loongarch/virt.h @@ -25,7 +25,7 @@ #define VIRT_LOWMEM_BASE 0 #define VIRT_LOWMEM_SIZE 0x10000000 -#define VIRT_HIGHMEM_BASE 0x90000000 +#define VIRT_HIGHMEM_BASE 0x80000000 #define VIRT_GED_EVT_ADDR 0x100e0000 #define VIRT_GED_MEM_ADDR (VIRT_GED_EVT_ADDR + ACPI_GED_EVT_SEL_LEN) #define VIRT_GED_REG_ADDR (VIRT_GED_MEM_ADDR + MEMORY_HOTPLUG_IO_LEN) diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index b26187dfde..07319d6fb9 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -764,6 +764,8 @@ void loongarch_cpu_dump_state(CPUState *cs, FILE *f, int flags) qemu_fprintf(f, "TLBRENTRY=%016" PRIx64 "\n", env->CSR_TLBRENTRY); qemu_fprintf(f, "TLBRBADV=%016" PRIx64 "\n", env->CSR_TLBRBADV); qemu_fprintf(f, "TLBRERA=%016" PRIx64 "\n", env->CSR_TLBRERA); + qemu_fprintf(f, "TCFG=%016" PRIx64 "\n", env->CSR_TCFG); + qemu_fprintf(f, "TVAL=%016" PRIx64 "\n", env->CSR_TVAL); /* fpr */ if (flags & CPU_DUMP_FPU) { |