diff options
| author | Cai Huoqing <caihuoqing@baidu.com> | 2021-07-30 09:49:42 +0800 |
|---|---|---|
| committer | Laurent Vivier <laurent@vivier.eu> | 2021-09-16 11:55:02 +0200 |
| commit | 37557b09a6ee1dc93328b1dd53bb26c2b5897cc3 (patch) | |
| tree | f3eb3bcc1a88db6a4f0d26876da8c274ff87c980 | |
| parent | 7916b5fc8cd100c00d7a62e73cc26faf7a487cd9 (diff) | |
intel_iommu: Fix typo in comments
Fix typo:
*Unknwon ==> Unknown
*futher ==> further
*configed ==> configured
Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Acked-by: Peter Xu <peterx@redhat.com>
Message-Id: <20210730014942.2311-1-caihuoqing@baidu.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
| -rw-r--r-- | hw/i386/intel_iommu.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 209b3f5553..75f075547f 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -679,7 +679,7 @@ static inline bool vtd_pe_type_check(X86IOMMUState *x86_iommu, } break; default: - /* Unknwon type */ + /* Unknown type */ return false; } return true; @@ -692,7 +692,7 @@ static inline bool vtd_pdire_present(VTDPASIDDirEntry *pdire) /** * Caller of this function should check present bit if wants - * to use pdir entry for futher usage except for fpd bit check. + * to use pdir entry for further usage except for fpd bit check. */ static int vtd_get_pdire_from_pdir_table(dma_addr_t pasid_dir_base, uint32_t pasid, @@ -746,7 +746,7 @@ static int vtd_get_pe_in_pasid_leaf_table(IntelIOMMUState *s, /** * Caller of this function should check present bit if wants - * to use pasid entry for futher usage except for fpd bit check. + * to use pasid entry for further usage except for fpd bit check. */ static int vtd_get_pe_from_pdire(IntelIOMMUState *s, uint32_t pasid, @@ -1507,7 +1507,7 @@ static int vtd_sync_shadow_page_table(VTDAddressSpace *vtd_as) } /* - * Check if specific device is configed to bypass address + * Check if specific device is configured to bypass address * translation for DMA requests. In Scalable Mode, bypass * 1st-level translation or 2nd-level translation, it depends * on PGTT setting. |