diff options
author | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-11-12 23:40:49 +0000 |
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committer | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-11-12 23:40:49 +0000 |
commit | c3e3682388f422921b2ae13264d35859981da752 (patch) | |
tree | e1cbf6498a8063a4dad58e79629e79c5df5d8cce | |
parent | 65d6c0f33c1a496d2a782bb0ef2ef18d4ed6b763 (diff) |
Add PVR and SPR definition for most embedded PowerPC from Freescale.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3632 c046a42c-6fe2-441c-8c8c-71466251a162
-rw-r--r-- | target-ppc/translate_init.c | 368 |
1 files changed, 309 insertions, 59 deletions
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 20a24b4537..d663f79e41 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -4750,43 +4750,179 @@ enum { CPU_POWERPC_464H90FP = xxx, #endif /* Freescale embedded PowerPC cores */ + /* PowerPC MPC 5xx cores (aka RCPU) */ + CPU_POWERPC_5xx = 0x00020020, +#define CPU_POWERPC_509 CPU_POWERPC_5xx +#define CPU_POWERPC_533 CPU_POWERPC_5xx +#define CPU_POWERPC_534 CPU_POWERPC_5xx +#define CPU_POWERPC_555 CPU_POWERPC_5xx +#define CPU_POWERPC_556 CPU_POWERPC_5xx +#define CPU_POWERPC_560 CPU_POWERPC_5xx +#define CPU_POWERPC_561 CPU_POWERPC_5xx +#define CPU_POWERPC_562 CPU_POWERPC_5xx +#define CPU_POWERPC_563 CPU_POWERPC_5xx +#define CPU_POWERPC_564 CPU_POWERPC_5xx +#define CPU_POWERPC_565 CPU_POWERPC_5xx +#define CPU_POWERPC_566 CPU_POWERPC_5xx + /* PowerPC MPC 8xx cores (aka PowerQUICC) */ + CPU_POWERPC_8xx = 0x00500000, +#define CPU_POWERPC_821 CPU_POWERPC_8xx +#define CPU_POWERPC_823 CPU_POWERPC_8xx +#define CPU_POWERPC_850 CPU_POWERPC_8xx +#define CPU_POWERPC_852T CPU_POWERPC_8xx +#define CPU_POWERPC_855T CPU_POWERPC_8xx +#define CPU_POWERPC_859 CPU_POWERPC_8xx +#define CPU_POWERPC_860 CPU_POWERPC_8xx +#define CPU_POWERPC_862 CPU_POWERPC_8xx +#define CPU_POWERPC_866 CPU_POWERPC_8xx +#define CPU_POWERPC_857 CPU_POWERPC_8xx +#define CPU_POWERPC_870 CPU_POWERPC_8xx +#define CPU_POWERPC_875 CPU_POWERPC_8xx +#define CPU_POWERPC_880 CPU_POWERPC_8xx +#define CPU_POWERPC_885 CPU_POWERPC_8xx + /* G2 cores (aka PowerQUICC-II) */ + CPU_POWERPC_G2 = 0x00810011, + CPU_POWERPC_G2H4 = 0x80811010, + CPU_POWERPC_G2gp = 0x80821010, + CPU_POWERPC_G2ls = 0x90810010, + CPU_POWERPC_MPC603 = 0x00810100, +#define CPU_POWERPC_MPC8240 CPU_POWERPC_MPC603 + CPU_POWERPC_G2_HIP3 = 0x00810101, +#define CPU_POWERPC_MPC8250_HiP3 CPU_POWERPC_G2_HIP3 +#define CPU_POWERPC_MPC8255_HiP3 CPU_POWERPC_G2_HIP3 +#define CPU_POWERPC_MPC8260_HiP3 CPU_POWERPC_G2_HIP3 +#define CPU_POWERPC_MPC8264_HiP3 CPU_POWERPC_G2_HIP3 +#define CPU_POWERPC_MPC8265_HiP3 CPU_POWERPC_G2_HIP3 +#define CPU_POWERPC_MPC8266_HiP3 CPU_POWERPC_G2_HIP3 + CPU_POWERPC_G2_HIP4 = 0x80811014, +#define CPU_POWERPC_MPC8241 CPU_POWERPC_G2_HIP4 +#define CPU_POWERPC_MPC8245 CPU_POWERPC_G2_HIP4 +#define CPU_POWERPC_MPC8250_HiP4 CPU_POWERPC_G2_HIP4 +#define CPU_POWERPC_MPC8255_HiP4 CPU_POWERPC_G2_HIP4 +#define CPU_POWERPC_MPC8260_HiP4 CPU_POWERPC_G2_HIP4 +#define CPU_POWERPC_MPC8264_HiP4 CPU_POWERPC_G2_HIP4 +#define CPU_POWERPC_MPC8265_HiP4 CPU_POWERPC_G2_HIP4 +#define CPU_POWERPC_MPC8266_HiP4 CPU_POWERPC_G2_HIP4 + /* G2_LE core (aka PowerQUICC-II) */ + CPU_POWERPC_G2LE = 0x80820010, + CPU_POWERPC_G2LEgp = 0x80822010, + CPU_POWERPC_G2LEls = 0xA0822010, + CPU_POWERPC_G2LEgp1 = 0x80822011, + /* XXX: MPC 5121 ? */ +#define CPU_POWERPC_MPC5200 CPU_POWERPC_G2LEgp1 + CPU_POWERPC_G2LEgp3 = 0x80822013, +#define CPU_POWERPC_MPC8247 CPU_POWERPC_G2LEgp3 +#define CPU_POWERPC_MPC8248 CPU_POWERPC_G2LEgp3 +#define CPU_POWERPC_MPC8270 CPU_POWERPC_G2LEgp3 +#define CPU_POWERPC_MPC8271 CPU_POWERPC_G2LEgp3 +#define CPU_POWERPC_MPC8272 CPU_POWERPC_G2LEgp3 +#define CPU_POWERPC_MPC8275 CPU_POWERPC_G2LEgp3 +#define CPU_POWERPC_MPC8280 CPU_POWERPC_G2LEgp3 /* e200 family */ #define CPU_POWERPC_e200 CPU_POWERPC_e200z6 #if 0 CPU_POWERPC_e200z0 = xxx, +#define CPU_POWERPC_MPC5514E_v0 CPU_POWERPC_e200z0 +#define CPU_POWERPC_MPC5514G_v0 CPU_POWERPC_e200z0 +#define CPU_POWERPC_MPC5516E_v0 CPU_POWERPC_e200z0 +#define CPU_POWERPC_MPC5516G_v0 CPU_POWERPC_e200z0 #endif #if 0 - CPU_POWERPC_e200z3 = xxx, + CPU_POWERPC_e200z1 = xxx, +#define CPU_POWERPC_MPC5514E_v1 CPU_POWERPC_e200z1 +#define CPU_POWERPC_MPC5514G_v1 CPU_POWERPC_e200z1 +#define CPU_POWERPC_MPC5515S CPU_POWERPC_e200z1 +#define CPU_POWERPC_MPC5516E_v1 CPU_POWERPC_e200z1 +#define CPU_POWERPC_MPC5516G_v1 CPU_POWERPC_e200z1 +#define CPU_POWERPC_MPC5516S CPU_POWERPC_e200z1 +#endif +#if 0 /* ? */ + CPU_POWERPC_e200z3 = 0x81120000, +#define CPU_POWERPC_MPC5533 CPU_POWERPC_e200z3 +#define CPU_POWERPC_MPC5534 CPU_POWERPC_e200z3 #endif CPU_POWERPC_e200z5 = 0x81000000, CPU_POWERPC_e200z6 = 0x81120000, +#define CPU_POWERPC_MPC5553 CPU_POWERPC_e200z6 +#define CPU_POWERPC_MPC5554 CPU_POWERPC_e200z6 +#define CPU_POWERPC_MPC5561 CPU_POWERPC_e200z6 +#define CPU_POWERPC_MPC5565 CPU_POWERPC_e200z6 +#define CPU_POWERPC_MPC5566 CPU_POWERPC_e200z6 +#define CPU_POWERPC_MPC5567 CPU_POWERPC_e200z6 /* e300 family */ #define CPU_POWERPC_e300 CPU_POWERPC_e300c3 CPU_POWERPC_e300c1 = 0x00830000, +#define CPU_POWERPC_MPC8343A CPU_POWERPC_e300c1 +#define CPU_POWERPC_MPC8343EA CPU_POWERPC_e300c1 +#define CPU_POWERPC_MPC8347A CPU_POWERPC_e300c1 +#define CPU_POWERPC_MPC8347EA CPU_POWERPC_e300c1 +#define CPU_POWERPC_MPC8349 CPU_POWERPC_e300c1 +#define CPU_POWERPC_MPC8349E CPU_POWERPC_e300c1 +#define CPU_POWERPC_MPC8358E CPU_POWERPC_e300c1 +#define CPU_POWERPC_MPC8360E CPU_POWERPC_e300c1 CPU_POWERPC_e300c2 = 0x00840000, +#define CPU_POWERPC_MPC8321 CPU_POWERPC_e300c2 +#define CPU_POWERPC_MPC8321E CPU_POWERPC_e300c2 +#define CPU_POWERPC_MPC8323 CPU_POWERPC_e300c2 +#define CPU_POWERPC_MPC8323E CPU_POWERPC_e300c2 CPU_POWERPC_e300c3 = 0x00850000, +#define CPU_POWERPC_MPC8313 CPU_POWERPC_e300c3 +#define CPU_POWERPC_MPC8313E CPU_POWERPC_e300c3 +#define CPU_POWERPC_MPC8314 CPU_POWERPC_e300c3 +#define CPU_POWERPC_MPC8314E CPU_POWERPC_e300c3 +#define CPU_POWERPC_MPC8315 CPU_POWERPC_e300c3 +#define CPU_POWERPC_MPC8315E CPU_POWERPC_e300c3 + CPU_POWERPC_e300c4 = 0x00860000, +#define CPU_POWERPC_MPC8377 CPU_POWERPC_e300c4 +#define CPU_POWERPC_MPC8377E CPU_POWERPC_e300c4 +#define CPU_POWERPC_MPC8378 CPU_POWERPC_e300c4 +#define CPU_POWERPC_MPC8378E CPU_POWERPC_e300c4 +#define CPU_POWERPC_MPC8379 CPU_POWERPC_e300c4 +#define CPU_POWERPC_MPC8379E CPU_POWERPC_e300c4 /* e500 family */ #define CPU_POWERPC_e500 CPU_POWERPC_e500_v22 - CPU_POWERPC_e500_v11 = 0x80200010, - CPU_POWERPC_e500_v12 = 0x80200020, - CPU_POWERPC_e500_v21 = 0x80210010, - CPU_POWERPC_e500_v22 = 0x80210020, -#if 0 - CPU_POWERPC_e500mc = xxx, -#endif + CPU_POWERPC_e500_v10 = 0x80200010, +#define CPU_POWERPC_MPC8540_v1 CPU_POWERPC_e500_v10 + CPU_POWERPC_e500_v20 = 0x80200020, +#define CPU_POWERPC_MPC8540_v2 CPU_POWERPC_e500_v20 +#define CPU_POWERPC_MPC8541 CPU_POWERPC_e500_v20 +#define CPU_POWERPC_MPC8541E CPU_POWERPC_e500_v20 +#define CPU_POWERPC_MPC8555 CPU_POWERPC_e500_v20 +#define CPU_POWERPC_MPC8555E CPU_POWERPC_e500_v20 +#define CPU_POWERPC_MPC8560 CPU_POWERPC_e500_v20 + CPU_POWERPC_e500v2_v10 = 0x80210010, +#define CPU_POWERPC_MPC8543 CPU_POWERPC_e500v2_v10 +#define CPU_POWERPC_MPC8543E CPU_POWERPC_e500v2_v10 +#define CPU_POWERPC_MPC8545 CPU_POWERPC_e500v2_v10 +#define CPU_POWERPC_MPC8545E CPU_POWERPC_e500v2_v10 +#define CPU_POWERPC_MPC8547E CPU_POWERPC_e500v2_v10 +#define CPU_POWERPC_MPC8548 CPU_POWERPC_e500v2_v10 +#define CPU_POWERPC_MPC8548E CPU_POWERPC_e500v2_v10 + CPU_POWERPC_e500v2_v20 = 0x80210020, + CPU_POWERPC_e500v2_v21 = 0x80210021, +#define CPU_POWERPC_MPC8533_v10 CPU_POWERPC_e500v2_v21 +#define CPU_POWERPC_MPC8533E_v10 CPU_POWERPC_e500v2_v21 +#define CPU_POWERPC_MPC8544_v10 CPU_POWERPC_e500v2_v21 +#define CPU_POWERPC_MPC8544E_v10 CPU_POWERPC_e500v2_v21 + CPU_POWERPC_e500v2_v22 = 0x80210022, +#define CPU_POWERPC_MPC8533_v11 CPU_POWERPC_e500v2_v22 +#define CPU_POWERPC_MPC8533E_v11 CPU_POWERPC_e500v2_v22 +#define CPU_POWERPC_MPC8544_v11 CPU_POWERPC_e500v2_v22 +#define CPU_POWERPC_MPC8544E_v11 CPU_POWERPC_e500v2_v22 +#define CPU_POWERPC_MPC8567 CPU_POWERPC_e500v2_v22 +#define CPU_POWERPC_MPC8568 CPU_POWERPC_e500v2_v22 + CPU_POWERPC_e500v2_v30 = 0x80210030, +#define CPU_POWERPC_MPC8572 CPU_POWERPC_e500v2_v30 /* e600 family */ CPU_POWERPC_e600 = 0x80040010, - /* PowerPC MPC 5xx cores */ - CPU_POWERPC_5xx = 0x00020020, - /* PowerPC MPC 8xx cores (aka PowerQUICC) */ - CPU_POWERPC_8xx = 0x00500000, - /* PowerPC MPC 8xxx cores (aka PowerQUICC-II) */ - CPU_POWERPC_82xx_HIP3 = 0x00810101, - CPU_POWERPC_82xx_HIP4 = 0x80811014, - CPU_POWERPC_827x = 0x80822013, +#define CPU_POWERPC_MPC8610 CPU_POWERPC_e600 +#define CPU_POWERPC_MPC8641 CPU_POWERPC_e600 +#define CPU_POWERPC_MPC8641D CPU_POWERPC_e600 /* PowerPC 6xx cores */ - CPU_POWERPC_601 = 0x00010001, - CPU_POWERPC_601a = 0x00010002, +#define CPU_POWERPC_601 CPU_POWERPC_601_v2 + CPU_POWERPC_601_v0 = 0x00010001, + CPU_POWERPC_601_v1 = 0x00010001, + CPU_POWERPC_601_v2 = 0x00010002, CPU_POWERPC_602 = 0x00050100, CPU_POWERPC_603 = 0x00030100, #define CPU_POWERPC_603E CPU_POWERPC_603E_v41 @@ -4805,30 +4941,20 @@ enum { CPU_POWERPC_603E7 = 0x00070200, CPU_POWERPC_603P = 0x00070000, #define CPU_POWERPC_603R CPU_POWERPC_603E7t - CPU_POWERPC_G2 = 0x00810011, -#if 0 // Linux pretends the MSB is zero... - CPU_POWERPC_G2H4 = 0x80811010, - CPU_POWERPC_G2gp = 0x80821010, - CPU_POWERPC_G2ls = 0x90810010, - CPU_POWERPC_G2LE = 0x80820010, - CPU_POWERPC_G2LEgp = 0x80822010, - CPU_POWERPC_G2LEls = 0xA0822010, -#else - CPU_POWERPC_G2H4 = 0x00811010, - CPU_POWERPC_G2gp = 0x00821010, - CPU_POWERPC_G2ls = 0x10810010, - CPU_POWERPC_G2LE = 0x00820010, - CPU_POWERPC_G2LEgp = 0x00822010, - CPU_POWERPC_G2LEls = 0x20822010, -#endif + /* XXX: missing 0x00040303 (604) */ CPU_POWERPC_604 = 0x00040103, #define CPU_POWERPC_604E CPU_POWERPC_604E_v24 - CPU_POWERPC_604E_v10 = 0x00090100, /* Also 2110 & 2120 */ + /* XXX: missing 0x00091203 */ + /* XXX: missing 0x00092110 */ + /* XXX: missing 0x00092120 */ + CPU_POWERPC_604E_v10 = 0x00090100, CPU_POWERPC_604E_v22 = 0x00090202, CPU_POWERPC_604E_v24 = 0x00090204, - CPU_POWERPC_604R = 0x000a0101, /* Also 0x00093102 */ + /* XXX: missing 0x000a0100 */ + /* XXX: missing 0x00093102 */ + CPU_POWERPC_604R = 0x000a0101, #if 0 - CPU_POWERPC_604EV = xxx, + CPU_POWERPC_604EV = xxx, /* XXX: same as 604R ? */ #endif /* PowerPC 740/750 cores (aka G3) */ /* XXX: missing 0x00084202 */ @@ -4917,14 +5043,17 @@ enum { CPU_POWERPC_7450_v21 = 0x80000201, /* aka E */ CPU_POWERPC_74x1 = 0x80000203, CPU_POWERPC_74x1G = 0x80000210, /* aka G: 2.3 */ - /* XXX: missing 0x80010200 */ #define CPU_POWERPC_74x5 CPU_POWERPC_74x5_v32 CPU_POWERPC_74x5_v10 = 0x80010100, + /* XXX: missing 0x80010200 */ CPU_POWERPC_74x5_v21 = 0x80010201, /* aka C: 2.1 */ CPU_POWERPC_74x5_v32 = 0x80010302, CPU_POWERPC_74x5_v33 = 0x80010303, /* aka F: 3.3 */ CPU_POWERPC_74x5_v34 = 0x80010304, /* aka G: 3.4 */ #define CPU_POWERPC_74x7 CPU_POWERPC_74x7_v12 + /* XXX: is 0x8002xxxx 7447 and 0x8003xxxx 7457 ? */ + /* XXX: missing 0x80030102 */ + /* XXX: missing 0x80020101 */ CPU_POWERPC_74x7_v10 = 0x80020100, /* aka A: 1.0 */ CPU_POWERPC_74x7_v11 = 0x80030101, /* aka B: 1.1 */ CPU_POWERPC_74x7_v12 = 0x80020102, /* aka C: 1.2 */ @@ -4935,6 +5064,7 @@ enum { CPU_POWERPC_631 = 0x00410104, CPU_POWERPC_POWER4 = 0x00350000, CPU_POWERPC_POWER4P = 0x00380000, + /* XXX: missing 0x003A0201 */ CPU_POWERPC_POWER5 = 0x003A0203, #define CPU_POWERPC_POWER5GR CPU_POWERPC_POWER5 CPU_POWERPC_POWER5P = 0x003B0000, @@ -4980,26 +5110,142 @@ enum { /* System version register (used on MPC 8xxx) */ enum { - PPC_SVR_8540 = 0x80300000, - PPC_SVR_8541E = 0x807A0010, - PPC_SVR_8543v10 = 0x80320010, - PPC_SVR_8543v11 = 0x80320011, - PPC_SVR_8543v20 = 0x80320020, - PPC_SVR_8543Ev10 = 0x803A0010, - PPC_SVR_8543Ev11 = 0x803A0011, - PPC_SVR_8543Ev20 = 0x803A0020, - PPC_SVR_8545 = 0x80310220, - PPC_SVR_8545E = 0x80390220, - PPC_SVR_8547E = 0x80390120, - PPC_SCR_8548v10 = 0x80310010, - PPC_SCR_8548v11 = 0x80310011, - PPC_SCR_8548v20 = 0x80310020, - PPC_SVR_8548Ev10 = 0x80390010, - PPC_SVR_8548Ev11 = 0x80390011, - PPC_SVR_8548Ev20 = 0x80390020, - PPC_SVR_8555E = 0x80790010, - PPC_SVR_8560v10 = 0x80700010, - PPC_SVR_8560v20 = 0x80700020, + PPC_SVR_5200_v10 = 0x80110010, + PPC_SVR_5200_v11 = 0x80110011, + PPC_SVR_5200_v12 = 0x80110012, + PPC_SVR_5200B_v20 = 0x80110020, + PPC_SVR_5200B_v21 = 0x80110021, +#if 0 + PPC_SVR_5533 = xxx, +#endif +#if 0 + PPC_SVR_5534 = xxx, +#endif +#if 0 + PPC_SVR_5553 = xxx, +#endif +#if 0 + PPC_SVR_5554 = xxx, +#endif +#if 0 + PPC_SVR_5561 = xxx, +#endif +#if 0 + PPC_SVR_5565 = xxx, +#endif +#if 0 + PPC_SVR_5566 = xxx, +#endif +#if 0 + PPC_SVR_5567 = xxx, +#endif +#if 0 + PPC_SVR_8313 = xxx, +#endif +#if 0 + PPC_SVR_8313E = xxx, +#endif +#if 0 + PPC_SVR_8314 = xxx, +#endif +#if 0 + PPC_SVR_8314E = xxx, +#endif +#if 0 + PPC_SVR_8315 = xxx, +#endif +#if 0 + PPC_SVR_8315E = xxx, +#endif +#if 0 + PPC_SVR_8321 = xxx, +#endif +#if 0 + PPC_SVR_8321E = xxx, +#endif +#if 0 + PPC_SVR_8323 = xxx, +#endif +#if 0 + PPC_SVR_8323E = xxx, +#endif + PPC_SVR_8343A = 0x80570030, + PPC_SVR_8343EA = 0x80560030, + PPC_SVR_8347AP = 0x80550030, /* PBGA package */ + PPC_SVR_8347AT = 0x80530030, /* TBGA package */ + PPC_SVR_8347EAP = 0x80540030, /* PBGA package */ + PPC_SVR_8347EAT = 0x80520030, /* TBGA package */ + PPC_SVR_8349 = 0x80510010, + PPC_SVR_8349A = 0x80510030, + PPC_SVR_8349E = 0x80500010, + PPC_SVR_8349EA = 0x80500030, +#if 0 + PPC_SVR_8358E = xxx, +#endif +#if 0 + PPC_SVR_8360E = xxx, +#endif + PPC_SVR_8377 = 0x80C70010, + PPC_SVR_8377E = 0x80C60010, + PPC_SVR_8378 = 0x80C50010, + PPC_SVR_8378E = 0x80C40010, + PPC_SVR_8379 = 0x80C30010, + PPC_SVR_8379E = 0x80C00010, + PPC_SVR_8533_v10 = 0x80340010, + PPC_SVR_8533_v11 = 0x80340011, + PPC_SVR_8533E_v10 = 0x803C0010, + PPC_SVR_8533E_v11 = 0x803C0011, + PPC_SVR_8540_v10 = 0x80300010, + PPC_SVR_8540_v20 = 0x80300020, + PPC_SVR_8540_v21 = 0x80300021, + PPC_SVR_8541_v10 = 0x80720010, + PPC_SVR_8541_v11 = 0x80720011, + PPC_SVR_8541E_v10 = 0x807A0010, + PPC_SVR_8541E_v11 = 0x807A0011, + PPC_SVR_8543_v10 = 0x80320010, + PPC_SVR_8543_v11 = 0x80320011, + PPC_SVR_8543_v20 = 0x80320020, + PPC_SVR_8543_v21 = 0x80320021, + PPC_SVR_8543E_v10 = 0x803A0010, + PPC_SVR_8543E_v11 = 0x803A0011, + PPC_SVR_8543E_v20 = 0x803A0020, + PPC_SVR_8543E_v21 = 0x803A0021, + PPC_SVR_8544_v10 = 0x80340110, + PPC_SVR_8544_v11 = 0x80340111, + PPC_SVR_8544E_v10 = 0x803C0110, + PPC_SVR_8544E_v11 = 0x803C0111, + PPC_SVR_8545_v20 = 0x80310220, + PPC_SVR_8545_v21 = 0x80310221, + PPC_SVR_8545E_v20 = 0x80390220, + PPC_SVR_8545E_v21 = 0x80390221, + PPC_SVR_8547E_v20 = 0x80390120, + PPC_SVR_8547E_v21 = 0x80390121, + PPC_SCR_8548_v10 = 0x80310010, + PPC_SCR_8548_v11 = 0x80310011, + PPC_SCR_8548_v20 = 0x80310020, + PPC_SCR_8548_v21 = 0x80310021, + PPC_SVR_8548E_v10 = 0x80390010, + PPC_SVR_8548E_v11 = 0x80390011, + PPC_SVR_8548E_v20 = 0x80390020, + PPC_SVR_8548E_v21 = 0x80390021, + PPC_SVR_8555_v10 = 0x80710010, + PPC_SVR_8555_v11 = 0x80710011, + PPC_SVR_8555E_v10 = 0x80790010, + PPC_SVR_8555E_v11 = 0x80790011, + PPC_SVR_8560_v10 = 0x80700010, + PPC_SVR_8560_v20 = 0x80700020, + PPC_SVR_8560_v21 = 0x80700021, + PPC_SVR_8567 = 0x80750111, + PPC_SVR_8567E = 0x807D0111, + PPC_SVR_8568 = 0x80750011, + PPC_SVR_8568E = 0x807D0011, + PPC_SVR_8572 = 0x80E00010, + PPC_SVR_8572E = 0x80E80010, +#if 0 + PPC_SVR_8610 = xxx, +#endif + PPC_SVR_8641 = 0x80900021, + PPC_SVR_8641D = 0x80900121, }; /*****************************************************************************/ @@ -5431,8 +5677,12 @@ static const ppc_def_t ppc_defs[] = { /* PowerPC 6xx family */ /* PowerPC 601 */ POWERPC_DEF("601", CPU_POWERPC_601, 601), + /* PowerPC 601v0 */ + POWERPC_DEF("601v0", CPU_POWERPC_601_v0, 601), + /* PowerPC 601v1 */ + POWERPC_DEF("601v1", CPU_POWERPC_601_v1, 601), /* PowerPC 601v2 */ - POWERPC_DEF("601a", CPU_POWERPC_601a, 601), + POWERPC_DEF("601v2", CPU_POWERPC_601_v2, 601), /* PowerPC 602 */ POWERPC_DEF("602", CPU_POWERPC_602, 602), /* PowerPC 603 */ |