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authorPeter Maydell <peter.maydell@linaro.org>2022-04-08 15:15:48 +0100
committerPeter Maydell <peter.maydell@linaro.org>2022-04-22 14:44:53 +0100
commit5a389a9aec382c5093c6c143a5a6ed7809eadc12 (patch)
tree1bee02b20594ba39689a3d5897ad52fdf30a8c25
parent445d5825dab3253f2d04d7e9749a06930f4a84d1 (diff)
hw/arm/virt: Use VIRT_GIC_VERSION_* enum values in create_gic()
Everywhere we need to check which GIC version we're using, we look at vms->gic_version and use the VIRT_GIC_VERSION_* enum values, except in create_gic(), which copies vms->gic_version into a local 'int' variable and makes direct comparisons against values 2 and 3. For consistency, change this function to check the GIC version the same way we do elsewhere. This includes not implicitly relying on the enumeration type values happening to match the integer 'revision' values the GIC device object wants. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220408141550.1271295-40-peter.maydell@linaro.org
-rw-r--r--hw/arm/virt.c31
1 files changed, 23 insertions, 8 deletions
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index bb6a2484d8..d5f8b0c74a 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -690,14 +690,29 @@ static void create_gic(VirtMachineState *vms, MemoryRegion *mem)
/* We create a standalone GIC */
SysBusDevice *gicbusdev;
const char *gictype;
- int type = vms->gic_version, i;
+ int i;
unsigned int smp_cpus = ms->smp.cpus;
uint32_t nb_redist_regions = 0;
+ int revision;
- gictype = (type == 3) ? gicv3_class_name() : gic_class_name();
+ if (vms->gic_version == VIRT_GIC_VERSION_2) {
+ gictype = gic_class_name();
+ } else {
+ gictype = gicv3_class_name();
+ }
+ switch (vms->gic_version) {
+ case VIRT_GIC_VERSION_2:
+ revision = 2;
+ break;
+ case VIRT_GIC_VERSION_3:
+ revision = 3;
+ break;
+ default:
+ g_assert_not_reached();
+ }
vms->gic = qdev_new(gictype);
- qdev_prop_set_uint32(vms->gic, "revision", type);
+ qdev_prop_set_uint32(vms->gic, "revision", revision);
qdev_prop_set_uint32(vms->gic, "num-cpu", smp_cpus);
/* Note that the num-irq property counts both internal and external
* interrupts; there are always 32 of the former (mandated by GIC spec).
@@ -707,7 +722,7 @@ static void create_gic(VirtMachineState *vms, MemoryRegion *mem)
qdev_prop_set_bit(vms->gic, "has-security-extensions", vms->secure);
}
- if (type == 3) {
+ if (vms->gic_version == VIRT_GIC_VERSION_3) {
uint32_t redist0_capacity =
vms->memmap[VIRT_GIC_REDIST].size / GICV3_REDIST_SIZE;
uint32_t redist0_count = MIN(smp_cpus, redist0_capacity);
@@ -742,7 +757,7 @@ static void create_gic(VirtMachineState *vms, MemoryRegion *mem)
gicbusdev = SYS_BUS_DEVICE(vms->gic);
sysbus_realize_and_unref(gicbusdev, &error_fatal);
sysbus_mmio_map(gicbusdev, 0, vms->memmap[VIRT_GIC_DIST].base);
- if (type == 3) {
+ if (vms->gic_version == VIRT_GIC_VERSION_3) {
sysbus_mmio_map(gicbusdev, 1, vms->memmap[VIRT_GIC_REDIST].base);
if (nb_redist_regions == 2) {
sysbus_mmio_map(gicbusdev, 2,
@@ -780,7 +795,7 @@ static void create_gic(VirtMachineState *vms, MemoryRegion *mem)
ppibase + timer_irq[irq]));
}
- if (type == 3) {
+ if (vms->gic_version == VIRT_GIC_VERSION_3) {
qemu_irq irq = qdev_get_gpio_in(vms->gic,
ppibase + ARCH_GIC_MAINT_IRQ);
qdev_connect_gpio_out_named(cpudev, "gicv3-maintenance-interrupt",
@@ -806,9 +821,9 @@ static void create_gic(VirtMachineState *vms, MemoryRegion *mem)
fdt_add_gic_node(vms);
- if (type == 3 && vms->its) {
+ if (vms->gic_version == VIRT_GIC_VERSION_3 && vms->its) {
create_its(vms);
- } else if (type == 2) {
+ } else if (vms->gic_version == VIRT_GIC_VERSION_2) {
create_v2m(vms);
}
}