diff options
| author | Tom Lendacky <thomas.lendacky@amd.com> | 2022-09-30 10:14:28 -0500 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2023-04-28 12:50:34 +0200 |
| commit | 326e3015c4c6f3197157ea0bb00826ae740e2fad (patch) | |
| tree | 17cc1a2af6dca122e9f43b2aec1f16805226e599 | |
| parent | 798a818f50a9bfc01e8b5943090de458863b897b (diff) | |
qemu-options.hx: Update the reduced-phys-bits documentation
A guest only ever experiences, at most, 1 bit of reduced physical
addressing. Update the documentation to reflect this as well as change
the example value on the reduced-phys-bits option.
Fixes: a9b4942f48 ("target/i386: add Secure Encrypted Virtualization (SEV) object")
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Message-Id: <13a62ced1808546c1d398e2025cf85f4c94ae123.1664550870.git.thomas.lendacky@amd.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| -rw-r--r-- | qemu-options.hx | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/qemu-options.hx b/qemu-options.hx index b5efa648ba..42fc90aae4 100644 --- a/qemu-options.hx +++ b/qemu-options.hx @@ -5438,7 +5438,7 @@ SRST physical address space. The ``reduced-phys-bits`` is used to provide the number of bits we loose in physical address space. Similar to C-bit, the value is Host family dependent. On EPYC, - the value should be 5. + a guest will lose a maximum of 1 bit, so the value should be 1. The ``sev-device`` provides the device file to use for communicating with the SEV firmware running inside AMD Secure @@ -5473,7 +5473,7 @@ SRST # |qemu_system_x86| \\ ...... \\ - -object sev-guest,id=sev0,cbitpos=47,reduced-phys-bits=5 \\ + -object sev-guest,id=sev0,cbitpos=47,reduced-phys-bits=1 \\ -machine ...,memory-encryption=sev0 \\ ..... |