diff options
| author | Eric Auger <eric.auger@redhat.com> | 2020-07-28 17:08:13 +0200 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-08-24 10:02:06 +0100 |
| commit | 5888f0ad12e40c8b079365593900df80b5c261bf (patch) | |
| tree | 8acc131b24feea23c3b0142ca27293ca83b69511 | |
| parent | f0ec277cd46c0c7b078cc6bc90201999bb0dcd0b (diff) | |
hw/arm/smmuv3: Let AIDR advertise SMMUv3.0 support
Add the support for AIDR register. It currently advertises
SMMU V3.0 spec.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20200728150815.11446-10-eric.auger@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | hw/arm/smmuv3-internal.h | 1 | ||||
| -rw-r--r-- | hw/arm/smmuv3.c | 3 | ||||
| -rw-r--r-- | include/hw/arm/smmuv3.h | 1 |
3 files changed, 5 insertions, 0 deletions
diff --git a/hw/arm/smmuv3-internal.h b/hw/arm/smmuv3-internal.h index ef093eaff5..bd34a4f330 100644 --- a/hw/arm/smmuv3-internal.h +++ b/hw/arm/smmuv3-internal.h @@ -64,6 +64,7 @@ REG32(IDR5, 0x14) #define SMMU_IDR5_OAS 4 REG32(IIDR, 0x18) +REG32(AIDR, 0x1c) REG32(CR0, 0x20) FIELD(CR0, SMMU_ENABLE, 0, 1) FIELD(CR0, EVENTQEN, 2, 1) diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index 89ab11fc36..718f28462e 100644 --- a/hw/arm/smmuv3.c +++ b/hw/arm/smmuv3.c @@ -1251,6 +1251,9 @@ static MemTxResult smmu_readl(SMMUv3State *s, hwaddr offset, case A_IIDR: *data = s->iidr; return MEMTX_OK; + case A_AIDR: + *data = s->aidr; + return MEMTX_OK; case A_CR0: *data = s->cr[0]; return MEMTX_OK; diff --git a/include/hw/arm/smmuv3.h b/include/hw/arm/smmuv3.h index 36b2f45253..68d7a963e0 100644 --- a/include/hw/arm/smmuv3.h +++ b/include/hw/arm/smmuv3.h @@ -41,6 +41,7 @@ typedef struct SMMUv3State { uint32_t idr[6]; uint32_t iidr; + uint32_t aidr; uint32_t cr[3]; uint32_t cr0ack; uint32_t statusr; |