diff options
| author | Gan Qixin <ganqixin@huawei.com> | 2021-01-15 15:56:56 +0800 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2021-01-21 13:00:41 +0100 |
| commit | acd15fc2e83ca224cbff3f3548630e67122bfdcd (patch) | |
| tree | 4e4e26a138344ca9460133d6ab6fd3c2094ff6cb | |
| parent | 23a77b2d18b84e410478e88f11c54911f7a649fc (diff) | |
util/cacheflush: Fix error generated by clang
When compiling qemu-fuzz-i386 on aarch64 host, clang reported the following
error:
../util/cacheflush.c:38:44: error: value size does not match register size
specified by the constraint and modifier [-Werror,-Wasm-operand-widths]
asm volatile("mrs\t%0, ctr_el0" : "=r"(save_ctr_el0));
^
../util/cacheflush.c:38:24: note: use constraint modifier "w"
asm volatile("mrs\t%0, ctr_el0" : "=r"(save_ctr_el0));
^~
%w0
Modify the type of save_ctr_el0 to uint64_t to fix it.
Reported-by: Euler Robot <euler.robot@huawei.com>
Signed-off-by: Gan Qixin <ganqixin@huawei.com>
Message-Id: <20210115075656.717957-1-ganqixin@huawei.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
| -rw-r--r-- | util/cacheflush.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/util/cacheflush.c b/util/cacheflush.c index 6a20723902..933355b0c9 100644 --- a/util/cacheflush.c +++ b/util/cacheflush.c @@ -32,7 +32,7 @@ void flush_idcache_range(uintptr_t rx, uintptr_t rw, size_t len) * We want to save the whole contents of CTR_EL0, so that we * have more than the linesize, but also IDC and DIC. */ -static unsigned int save_ctr_el0; +static uint64_t save_ctr_el0; static void __attribute__((constructor)) init_ctr_el0(void) { asm volatile("mrs\t%0, ctr_el0" : "=r"(save_ctr_el0)); @@ -46,9 +46,9 @@ void flush_idcache_range(uintptr_t rx, uintptr_t rw, size_t len) { const unsigned CTR_IDC = 1u << 28; const unsigned CTR_DIC = 1u << 29; - const unsigned int ctr_el0 = save_ctr_el0; - const uintptr_t icache_lsize = 4 << extract32(ctr_el0, 0, 4); - const uintptr_t dcache_lsize = 4 << extract32(ctr_el0, 16, 4); + const uint64_t ctr_el0 = save_ctr_el0; + const uintptr_t icache_lsize = 4 << extract64(ctr_el0, 0, 4); + const uintptr_t dcache_lsize = 4 << extract64(ctr_el0, 16, 4); uintptr_t p; /* |