aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorAndrew Baumann <Andrew.Baumann@microsoft.com>2015-12-21 14:47:49 -0800
committerStefan Hajnoczi <stefanha@redhat.com>2015-12-22 16:34:26 +0800
commit723697551a7e926abe7d3c7f2966012b8075143d (patch)
tree3a2ee22a73ed0ccaac6608dca4b288f1178f6d93
parent62d32ec817f985ce1c38868d279d449c80975ff2 (diff)
sdhci: add optional quirk property to disable card insertion/removal interrupts
This is needed for a quirk of the Raspberry Pi (bcm2835/6) MMC controller, where the card insert bit is documented as unimplemented (always reads zero, doesn't generate interrupts) but is in fact observed on hardware as set at power on, but is cleared (and remains clear) on subsequent controller resets. Signed-off-by: Andrew Baumann <Andrew.Baumann@microsoft.com> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: 1450738069-18664-4-git-send-email-Andrew.Baumann@microsoft.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
-rw-r--r--hw/sd/sdhci.c5
-rw-r--r--include/hw/sd/sdhci.h1
2 files changed, 5 insertions, 1 deletions
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index dd83e89d52..7acb4d7928 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -193,7 +193,9 @@ static void sdhci_reset(SDHCIState *s)
* initialization */
memset(&s->sdmasysad, 0, (uintptr_t)&s->capareg - (uintptr_t)&s->sdmasysad);
- sd_set_cb(s->card, s->ro_cb, s->eject_cb);
+ if (!s->noeject_quirk) {
+ sd_set_cb(s->card, s->ro_cb, s->eject_cb);
+ }
s->data_count = 0;
s->stopped_state = sdhc_not_stopped;
}
@@ -1276,6 +1278,7 @@ static Property sdhci_sysbus_properties[] = {
DEFINE_PROP_UINT32("capareg", SDHCIState, capareg,
SDHC_CAPAB_REG_DEFAULT),
DEFINE_PROP_UINT32("maxcurr", SDHCIState, maxcurr, 0),
+ DEFINE_PROP_BOOL("noeject-quirk", SDHCIState, noeject_quirk, false),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h
index e78d938570..ffd1f80891 100644
--- a/include/hw/sd/sdhci.h
+++ b/include/hw/sd/sdhci.h
@@ -77,6 +77,7 @@ typedef struct SDHCIState {
uint32_t buf_maxsz;
uint16_t data_count; /* current element in FIFO buffer */
uint8_t stopped_state;/* Current SDHC state */
+ bool noeject_quirk;/* Quirk to disable card insert/remove interrupts */
/* Buffer Data Port Register - virtual access point to R and W buffers */
/* Software Reset Register - always reads as 0 */
/* Force Event Auto CMD12 Error Interrupt Reg - write only */