diff options
| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2016-06-07 12:50:26 +1000 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2016-06-07 13:10:45 +1000 |
| commit | 2f9254d96450e3269a029b941f0a5bc60f2dfd16 (patch) | |
| tree | 9db15dbcae74b64ab0c908c1f0b72e9959fe795a | |
| parent | 5e31867fbdefca66fe29f02c59b950c716c2ce64 (diff) | |
ppc: Fix slbia decode
Since at least the 2.05 architecture, the slbia instruction takes an
IH field in the opcode to provide some control on the effect of the
slbia on the ERATs (level-1 TLB).
We can safely ignore it as we always flush the whole qemu TLB but
we should allow the bits in the decode.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| -rw-r--r-- | target-ppc/translate.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c index c7f5223e05..0b6a4b680b 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -9980,7 +9980,7 @@ GEN_HANDLER(tlbiel, 0x1F, 0x12, 0x08, 0x001F0001, PPC_MEM_TLBIE), GEN_HANDLER(tlbie, 0x1F, 0x12, 0x09, 0x001F0001, PPC_MEM_TLBIE), GEN_HANDLER(tlbsync, 0x1F, 0x16, 0x11, 0x03FFF801, PPC_MEM_TLBSYNC), #if defined(TARGET_PPC64) -GEN_HANDLER(slbia, 0x1F, 0x12, 0x0F, 0x03FFFC01, PPC_SLBI), +GEN_HANDLER(slbia, 0x1F, 0x12, 0x0F, 0x031FFC01, PPC_SLBI), GEN_HANDLER(slbie, 0x1F, 0x12, 0x0D, 0x03FF0001, PPC_SLBI), #endif GEN_HANDLER(eciwx, 0x1F, 0x16, 0x0D, 0x00000001, PPC_EXTERN), |