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authorJonathan Cameron <Jonathan.Cameron@huawei.com>2023-04-21 14:59:05 +0100
committerMichael S. Tsirkin <mst@redhat.com>2023-05-19 01:36:09 -0400
commit92ff7cabf97d9942ebaeafed6747dc18c8c1f697 (patch)
tree7a06d8c9d9e5d7b6219da87eabc54850f93bcaa7
parent23e1248d7e3cb7331a1cee13ff109a5c52471ec2 (diff)
hw/cxl: Fix endian handling for decoder commit.
Not a real problem yet as all supported architectures are little endian, but continue to tidy these up when touching code for other reasons. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20230421135906.3515-3-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
-rw-r--r--hw/cxl/cxl-component-utils.c8
-rw-r--r--hw/mem/cxl_type3.c9
2 files changed, 10 insertions, 7 deletions
diff --git a/hw/cxl/cxl-component-utils.c b/hw/cxl/cxl-component-utils.c
index 324be79b11..a3e6cf75cf 100644
--- a/hw/cxl/cxl-component-utils.c
+++ b/hw/cxl/cxl-component-utils.c
@@ -47,12 +47,12 @@ static void dumb_hdm_handler(CXLComponentState *cxl_cstate, hwaddr offset,
break;
}
- stl_le_p((uint8_t *)cache_mem + offset, value);
if (should_commit) {
- ARRAY_FIELD_DP32(cache_mem, CXL_HDM_DECODER0_CTRL, COMMIT, 0);
- ARRAY_FIELD_DP32(cache_mem, CXL_HDM_DECODER0_CTRL, ERR, 0);
- ARRAY_FIELD_DP32(cache_mem, CXL_HDM_DECODER0_CTRL, COMMITTED, 1);
+ value = FIELD_DP32(value, CXL_HDM_DECODER0_CTRL, COMMIT, 0);
+ value = FIELD_DP32(value, CXL_HDM_DECODER0_CTRL, ERR, 0);
+ value = FIELD_DP32(value, CXL_HDM_DECODER0_CTRL, COMMITTED, 1);
}
+ stl_le_p((uint8_t *)cache_mem + offset, value);
}
static void cxl_cache_mem_write_reg(void *opaque, hwaddr offset, uint64_t value,
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index 7647122cc6..a2a9b17dbb 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -314,14 +314,17 @@ static void hdm_decoder_commit(CXLType3Dev *ct3d, int which)
{
ComponentRegisters *cregs = &ct3d->cxl_cstate.crb;
uint32_t *cache_mem = cregs->cache_mem_registers;
+ uint32_t ctrl;
assert(which == 0);
+ ctrl = ldl_le_p(cache_mem + R_CXL_HDM_DECODER0_CTRL);
/* TODO: Sanity checks that the decoder is possible */
- ARRAY_FIELD_DP32(cache_mem, CXL_HDM_DECODER0_CTRL, COMMIT, 0);
- ARRAY_FIELD_DP32(cache_mem, CXL_HDM_DECODER0_CTRL, ERR, 0);
+ ctrl = FIELD_DP32(ctrl, CXL_HDM_DECODER0_CTRL, COMMIT, 0);
+ ctrl = FIELD_DP32(ctrl, CXL_HDM_DECODER0_CTRL, ERR, 0);
+ ctrl = FIELD_DP32(ctrl, CXL_HDM_DECODER0_CTRL, COMMITTED, 1);
- ARRAY_FIELD_DP32(cache_mem, CXL_HDM_DECODER0_CTRL, COMMITTED, 1);
+ stl_le_p(cache_mem + R_CXL_HDM_DECODER0_CTRL, ctrl);
}
static int ct3d_qmp_uncor_err_to_cxl(CxlUncorErrorType qmp_err)