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authorBALATON Zoltan <balaton@eik.bme.hu>2023-07-22 00:13:20 +0200
committerDaniel Henrique Barboza <danielhb413@gmail.com>2023-08-04 10:50:19 -0300
commit6b6d4c1a0116c51098975131c16ecf7cefe68e79 (patch)
tree4f674b24056de597274095e9497c6e831e216bd3
parent889dd6c525852e341c737aaca273a92fae05886f (diff)
ppc/pegasos2: Fix reg property of 64 bit BARs in device tree
The board firmware handles this correctly following the Open Firmware standard which we missed. This fixes 64 bit BARs when using VOF. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-ID: <20230721221320.1311E7456AB@zero.eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
-rw-r--r--hw/ppc/pegasos2.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c
index 6475acfbed..075367d94d 100644
--- a/hw/ppc/pegasos2.c
+++ b/hw/ppc/pegasos2.c
@@ -781,7 +781,11 @@ static void add_pci_device(PCIBus *bus, PCIDevice *d, void *opaque)
if (d->io_regions[i].type & PCI_BASE_ADDRESS_SPACE_IO) {
cells[j] |= cpu_to_be32(1 << 24);
} else {
- cells[j] |= cpu_to_be32(2 << 24);
+ if (d->io_regions[i].type & PCI_BASE_ADDRESS_MEM_TYPE_64) {
+ cells[j] |= cpu_to_be32(3 << 24);
+ } else {
+ cells[j] |= cpu_to_be32(2 << 24);
+ }
if (d->io_regions[i].type & PCI_BASE_ADDRESS_MEM_PREFETCH) {
cells[j] |= cpu_to_be32(4 << 28);
}