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authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-12-18 22:43:25 +0000
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-12-18 22:43:25 +0000
commit2231ef1084f1522508880e99ba60647f8d312c74 (patch)
treed66e9d46cc479e8ddb87c0c55726b4b31c097d94
parentdadd71a7777db0431149d3dee674f92c7d9f7bed (diff)
target-ppc: fix type of spe_acc.
ACC is a 64-bit register and needs to be specified as such regardless of the target. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6090 c046a42c-6fe2-441c-8c8c-71466251a162
-rw-r--r--target-ppc/cpu.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 973f50aa46..f7600c4356 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -602,7 +602,7 @@ struct CPUPPCState {
ppc_avr_t avr[32];
uint32_t vscr;
/* SPE registers */
- target_ulong spe_acc;
+ uint64_t spe_acc;
float_status spe_status;
uint32_t spe_fscr;