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authorStefan Weil <sw@weilnetz.de>2013-10-10 20:53:40 +0200
committerMichael Tokarev <mjt@tls.msk.ru>2013-10-26 13:01:57 +0400
commit73f395fa88d87ae14f38ad0aa7f863148d98eef2 (patch)
treeb7aa13cc1f7b13dd1b2be398f3575b0e62fcbd2c
parent2b170effc7a0bb27f019727e5be02cd989e54e7d (diff)
misc: New spelling fixes in comments
compatiblity -> compatibility continously -> continuously existance -> existence usefull -> useful shoudl -> should Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
-rw-r--r--block/iscsi.c2
-rw-r--r--hw/ppc/spapr.c2
-rw-r--r--target-alpha/translate.c2
-rw-r--r--tests/test-throttle.c4
4 files changed, 5 insertions, 5 deletions
diff --git a/block/iscsi.c b/block/iscsi.c
index a2a961e163..a2d578c0a7 100644
--- a/block/iscsi.c
+++ b/block/iscsi.c
@@ -866,7 +866,7 @@ retry:
/* in case the get_lba_status_callout fails (i.e.
* because the device is busy or the cmd is not
* supported) we pretend all blocks are allocated
- * for backwards compatiblity */
+ * for backwards compatibility */
goto out;
}
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 004184d841..74aa5cce51 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -120,7 +120,7 @@ int spapr_allocate_irq_block(int num, bool lsi, bool msi)
* it has to be aligned to num to support multiple
* MSI vectors. MSI-X is not affected by this.
* The hint is used for the first IRQ, the rest should
- * be allocated continously.
+ * be allocated continuously.
*/
if (msi) {
assert((num == 1) || (num == 2) || (num == 4) ||
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index c24910f6a1..1155e86e29 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -1601,7 +1601,7 @@ static ExitStatus gen_call_pal(DisasContext *ctx, int palcode)
tcg_temp_free(pc);
/* Since the destination is running in PALmode, we don't really
- need the page permissions check. We'll see the existance of
+ need the page permissions check. We'll see the existence of
the page when we create the TB, and we'll flush all TBs if
we change the PAL base register. */
if (!ctx->singlestep_enabled && !(ctx->tb->cflags & CF_LAST_IO)) {
diff --git a/tests/test-throttle.c b/tests/test-throttle.c
index 760812645b..1d4ffd3603 100644
--- a/tests/test-throttle.c
+++ b/tests/test-throttle.c
@@ -18,7 +18,7 @@ LeakyBucket bkt;
ThrottleConfig cfg;
ThrottleState ts;
-/* usefull function */
+/* useful function */
static bool double_cmp(double x, double y)
{
return fabsl(x - y) < 1e-6;
@@ -320,7 +320,7 @@ static void test_have_timer(void)
/* zero the structure */
memset(&ts, 0, sizeof(ts));
- /* no timer set shoudl return false */
+ /* no timer set should return false */
g_assert(!throttle_have_timer(&ts));
/* init the structure */