diff options
| author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2009-01-03 14:04:11 +0000 |
|---|---|---|
| committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2009-01-03 14:04:11 +0000 |
| commit | 6fa724a34a65645529a37ea363a69a6c9c93f6c1 (patch) | |
| tree | 3bd33838d95504937fc37e1243aad3423eac6371 | |
| parent | e40393399a4ed120deee90b0fdd5afbd8aa2301e (diff) | |
Add vscr access macros.
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6158 c046a42c-6fe2-441c-8c8c-71466251a162
| -rw-r--r-- | target-ppc/cpu.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index f7600c4356..113bba5451 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -525,6 +525,13 @@ enum { 0x1F) /*****************************************************************************/ +/* Vector status and control register */ +#define VSCR_NJ 16 /* Vector non-java */ +#define VSCR_SAT 0 /* Vector saturation */ +#define vscr_nj (((env->vscr) >> VSCR_NJ) & 0x1) +#define vscr_sat (((env->vscr) >> VSCR_SAT) & 0x1) + +/*****************************************************************************/ /* The whole PowerPC CPU context */ #define NB_MMU_MODES 3 |