diff options
author | James Clarke <jrtc27@jrtc27.com> | 2016-01-24 15:41:25 +0000 |
---|---|---|
committer | David Gibson <david@gibson.dropbear.id.au> | 2016-01-30 23:49:27 +1100 |
commit | fc03cfef8b1f2d855c96fd6942914f5104b57e71 (patch) | |
tree | 42d7940279df5ee8ff742821d6dc6671a41f9d06 | |
parent | a8891fbf216b643586937f01bb7478e4e5a319f8 (diff) |
target-ppc: Make every FPSCR_ macro have a corresponding FP_ macro
Signed-off-by: James Clarke <jrtc27@jrtc27.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
-rw-r--r-- | target-ppc/cpu.h | 31 |
1 files changed, 22 insertions, 9 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 082039006f..f300c8613c 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -687,24 +687,37 @@ enum { #define FP_FX (1ull << FPSCR_FX) #define FP_FEX (1ull << FPSCR_FEX) +#define FP_VX (1ull << FPSCR_VX) #define FP_OX (1ull << FPSCR_OX) -#define FP_OE (1ull << FPSCR_OE) #define FP_UX (1ull << FPSCR_UX) -#define FP_UE (1ull << FPSCR_UE) -#define FP_XX (1ull << FPSCR_XX) -#define FP_XE (1ull << FPSCR_XE) #define FP_ZX (1ull << FPSCR_ZX) -#define FP_ZE (1ull << FPSCR_ZE) -#define FP_VX (1ull << FPSCR_VX) +#define FP_XX (1ull << FPSCR_XX) #define FP_VXSNAN (1ull << FPSCR_VXSNAN) #define FP_VXISI (1ull << FPSCR_VXISI) -#define FP_VXIMZ (1ull << FPSCR_VXIMZ) -#define FP_VXZDZ (1ull << FPSCR_VXZDZ) #define FP_VXIDI (1ull << FPSCR_VXIDI) +#define FP_VXZDZ (1ull << FPSCR_VXZDZ) +#define FP_VXIMZ (1ull << FPSCR_VXIMZ) #define FP_VXVC (1ull << FPSCR_VXVC) +#define FP_FR (1ull << FSPCR_FR) +#define FP_FI (1ull << FPSCR_FI) +#define FP_C (1ull << FPSCR_C) +#define FP_FL (1ull << FPSCR_FL) +#define FP_FG (1ull << FPSCR_FG) +#define FP_FE (1ull << FPSCR_FE) +#define FP_FU (1ull << FPSCR_FU) +#define FP_FPCC (FP_FL | FP_FG | FP_FE | FP_FU) +#define FP_FPRF (FP_C | FP_FL | FP_FG | FP_FE | FP_FU) +#define FP_VXSOFT (1ull << FPSCR_VXSOFT) +#define FP_VXSQRT (1ull << FPSCR_VXSQRT) #define FP_VXCVI (1ull << FPSCR_VXCVI) #define FP_VE (1ull << FPSCR_VE) -#define FP_FI (1ull << FPSCR_FI) +#define FP_OE (1ull << FPSCR_OE) +#define FP_UE (1ull << FPSCR_UE) +#define FP_ZE (1ull << FPSCR_ZE) +#define FP_XE (1ull << FPSCR_XE) +#define FP_NI (1ull << FPSCR_NI) +#define FP_RN1 (1ull << FPSCR_RN1) +#define FP_RN (1ull << FPSCR_RN) /*****************************************************************************/ /* Vector status and control register */ |