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authorTsuneo Saito <tsnsaito@gmail.com>2011-07-14 18:41:39 +0900
committerBlue Swirl <blauwirbel@gmail.com>2011-07-14 15:36:15 +0000
commit5f06b54718b063840e14a93cd1059c3a92e4603a (patch)
treed286f31760546359177b37577cb1e236d6695ffd
parente1ef36c4a34082a075182ec0ba44c80a2dbf43c2 (diff)
SPARC64: fp_disabled checks on stfa/stdfa/stqfa
stfa/stdfa/stqfa instructions should raise fp_disabled exceptions if %pstate.PEF==0 or %fprs.FEF==0. Signed-off-by: Tsuneo Saito <tsnsaito@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
-rw-r--r--target-sparc/translate.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index a5a8eaf308..5f92dbb819 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -4732,6 +4732,9 @@ static void disas_sparc_insn(DisasContext * dc)
switch (xop) {
#ifdef TARGET_SPARC64
case 0x34: /* V9 stfa */
+ if (gen_trap_ifnofpu(dc, cpu_cond)) {
+ goto jmp_insn;
+ }
gen_stf_asi(cpu_addr, insn, 4, rd);
break;
case 0x36: /* V9 stqfa */
@@ -4739,6 +4742,9 @@ static void disas_sparc_insn(DisasContext * dc)
TCGv_i32 r_const;
CHECK_FPU_FEATURE(dc, FLOAT128);
+ if (gen_trap_ifnofpu(dc, cpu_cond)) {
+ goto jmp_insn;
+ }
r_const = tcg_const_i32(7);
gen_helper_check_align(cpu_addr, r_const);
tcg_temp_free_i32(r_const);
@@ -4746,6 +4752,9 @@ static void disas_sparc_insn(DisasContext * dc)
}
break;
case 0x37: /* V9 stdfa */
+ if (gen_trap_ifnofpu(dc, cpu_cond)) {
+ goto jmp_insn;
+ }
gen_stf_asi(cpu_addr, insn, 8, DFPREG(rd));
break;
case 0x3c: /* V9 casa */