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authorPaolo Bonzini <pbonzini@redhat.com>2019-07-01 16:51:24 +0200
committerPaolo Bonzini <pbonzini@redhat.com>2019-10-04 18:49:19 +0200
commit49d51b8927a9ea7267f4677a2e92f5046ce74025 (patch)
treec9216a164f6a6b9728f12b4fd1e849b2c7db94aa
parent704798add83be4ac868ffcb495480065fb665794 (diff)
vmxcap: correct the name of the variables
The low bits are 1 if the control must be one, the high bits are 1 if the control can be one. Correct the variable names as they are very confusing. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
-rwxr-xr-xscripts/kvm/vmxcap14
1 files changed, 7 insertions, 7 deletions
diff --git a/scripts/kvm/vmxcap b/scripts/kvm/vmxcap
index d8c7d6dfb8..5dfeb2e03a 100755
--- a/scripts/kvm/vmxcap
+++ b/scripts/kvm/vmxcap
@@ -51,15 +51,15 @@ class Control(object):
return (val & 0xffffffff, val >> 32)
def show(self):
print(self.name)
- mbz, mb1 = self.read2(self.cap_msr)
- tmbz, tmb1 = 0, 0
+ mb1, cb1 = self.read2(self.cap_msr)
+ tmb1, tcb1 = 0, 0
if self.true_cap_msr:
- tmbz, tmb1 = self.read2(self.true_cap_msr)
+ tmb1, tcb1 = self.read2(self.true_cap_msr)
for bit in sorted(self.bits.keys()):
- zero = not (mbz & (1 << bit))
- one = mb1 & (1 << bit)
- true_zero = not (tmbz & (1 << bit))
- true_one = tmb1 & (1 << bit)
+ zero = not (mb1 & (1 << bit))
+ one = cb1 & (1 << bit)
+ true_zero = not (tmb1 & (1 << bit))
+ true_one = tcb1 & (1 << bit)
s= '?'
if (self.true_cap_msr and true_zero and true_one
and one and not zero):