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authorJoao Martins <joao.m.martins@oracle.com>2022-07-19 18:00:11 +0100
committerMichael S. Tsirkin <mst@redhat.com>2022-07-26 10:40:58 -0400
commit8288a8286d00e074b765f1d47ee61159ed5291fd (patch)
tree77c56cc68388820452b3b628383bfa580f68c24d
parent1065b21993628a00066a2ab1439bfff5d186c12d (diff)
i386/pc: factor out device_memory base/size to helper
Move obtaining hole64_start from device_memory memory region base/size into an helper alongside correspondent getters in pc_memory_init() when the hotplug range is unitialized. While doing that remove the memory region based logic from this newly added helper. This is the final step that allows pc_pci_hole64_start() to be callable at the beginning of pc_memory_init() before any memory regions are initialized. Cc: Jonathan Cameron <jonathan.cameron@huawei.com> Signed-off-by: Joao Martins <joao.m.martins@oracle.com> Acked-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20220719170014.27028-9-joao.m.martins@oracle.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
-rw-r--r--hw/i386/pc.c46
1 files changed, 31 insertions, 15 deletions
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 611eb197da..ebc27e4cb7 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -825,15 +825,36 @@ static hwaddr pc_above_4g_end(PCMachineState *pcms)
return x86ms->above_4g_mem_start + x86ms->above_4g_mem_size;
}
-static uint64_t pc_get_cxl_range_start(PCMachineState *pcms)
+static void pc_get_device_memory_range(PCMachineState *pcms,
+ hwaddr *base,
+ ram_addr_t *device_mem_size)
{
PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
MachineState *machine = MACHINE(pcms);
+ ram_addr_t size;
+ hwaddr addr;
+
+ size = machine->maxram_size - machine->ram_size;
+ addr = ROUND_UP(pc_above_4g_end(pcms), 1 * GiB);
+
+ if (pcmc->enforce_aligned_dimm) {
+ /* size device region assuming 1G page max alignment per slot */
+ size += (1 * GiB) * machine->ram_slots;
+ }
+
+ *base = addr;
+ *device_mem_size = size;
+}
+
+static uint64_t pc_get_cxl_range_start(PCMachineState *pcms)
+{
+ PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
hwaddr cxl_base;
+ ram_addr_t size;
- if (pcmc->has_reserved_memory && machine->device_memory->base) {
- cxl_base = machine->device_memory->base
- + memory_region_size(&machine->device_memory->mr);
+ if (pcmc->has_reserved_memory) {
+ pc_get_device_memory_range(pcms, &cxl_base, &size);
+ cxl_base += size;
} else {
cxl_base = pc_above_4g_end(pcms);
}
@@ -920,7 +941,7 @@ void pc_memory_init(PCMachineState *pcms,
/* initialize device memory address space */
if (pcmc->has_reserved_memory &&
(machine->ram_size < machine->maxram_size)) {
- ram_addr_t device_mem_size = machine->maxram_size - machine->ram_size;
+ ram_addr_t device_mem_size;
if (machine->ram_slots > ACPI_MAX_RAM_SLOTS) {
error_report("unsupported amount of memory slots: %"PRIu64,
@@ -935,13 +956,7 @@ void pc_memory_init(PCMachineState *pcms,
exit(EXIT_FAILURE);
}
- machine->device_memory->base =
- ROUND_UP(pc_above_4g_end(pcms), 1 * GiB);
-
- if (pcmc->enforce_aligned_dimm) {
- /* size device region assuming 1G page max alignment per slot */
- device_mem_size += (1 * GiB) * machine->ram_slots;
- }
+ pc_get_device_memory_range(pcms, &machine->device_memory->base, &device_mem_size);
if ((machine->device_memory->base + device_mem_size) <
device_mem_size) {
@@ -1046,13 +1061,14 @@ uint64_t pc_pci_hole64_start(void)
PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
MachineState *ms = MACHINE(pcms);
uint64_t hole64_start = 0;
+ ram_addr_t size = 0;
if (pcms->cxl_devices_state.is_enabled) {
hole64_start = pc_get_cxl_range_end(pcms);
- } else if (pcmc->has_reserved_memory && ms->device_memory->base) {
- hole64_start = ms->device_memory->base;
+ } else if (pcmc->has_reserved_memory && (ms->ram_size < ms->maxram_size)) {
+ pc_get_device_memory_range(pcms, &hole64_start, &size);
if (!pcmc->broken_reserved_end) {
- hole64_start += memory_region_size(&ms->device_memory->mr);
+ hole64_start += size;
}
} else {
hole64_start = pc_above_4g_end(pcms);