diff options
author | Paolo Bonzini <pbonzini@redhat.com> | 2016-03-04 11:30:21 +0000 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2016-03-04 11:30:21 +0000 |
commit | 9886ecdf31165de2d4b8bccc1a220bd6ac8bc192 (patch) | |
tree | dcf7ac4757818aec6738dc97b17e3f2c934ca2ef | |
parent | 91cca2cda9823b1e7a049cb308a05104b5076cba (diff) |
target-arm: implement setend
Since this is not a high-performance path, just use a helper to
flip the E bit and force a lookup in the hash table since the
flags have changed.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r-- | target-arm/helper.h | 1 | ||||
-rw-r--r-- | target-arm/op_helper.c | 5 | ||||
-rw-r--r-- | target-arm/translate.c | 14 |
3 files changed, 12 insertions, 8 deletions
diff --git a/target-arm/helper.h b/target-arm/helper.h index ea13202b17..e3d09d93bd 100644 --- a/target-arm/helper.h +++ b/target-arm/helper.h @@ -48,6 +48,7 @@ DEF_HELPER_FLAGS_3(sel_flags, TCG_CALL_NO_RWG_SE, i32, i32, i32, i32) DEF_HELPER_2(exception_internal, void, env, i32) DEF_HELPER_4(exception_with_syndrome, void, env, i32, i32, i32) +DEF_HELPER_1(setend, void, env) DEF_HELPER_1(wfi, void, env) DEF_HELPER_1(wfe, void, env) DEF_HELPER_1(yield, void, env) diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c index 4881e34177..92fde0a68c 100644 --- a/target-arm/op_helper.c +++ b/target-arm/op_helper.c @@ -296,6 +296,11 @@ uint32_t HELPER(usat16)(CPUARMState *env, uint32_t x, uint32_t shift) return res; } +void HELPER(setend)(CPUARMState *env) +{ + env->uncached_cpsr ^= CPSR_E; +} + /* Function checks whether WFx (WFI/WFE) instructions are set up to be trapped. * The function returns the target EL (1-3) if the instruction is to be trapped; * otherwise it returns 0 indicating it is not trapped. diff --git a/target-arm/translate.c b/target-arm/translate.c index c430fec7ad..c23ddb3bf2 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -7786,10 +7786,9 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn) if ((insn & 0x0ffffdff) == 0x01010000) { ARCH(6); /* setend */ - if (((insn >> 9) & 1) != bswap_code(s->sctlr_b)) { - /* Dynamic endianness switching not implemented. */ - qemu_log_mask(LOG_UNIMP, "arm: unimplemented setend\n"); - goto illegal_op; + if (((insn >> 9) & 1) != !!(s->be_data == MO_BE)) { + gen_helper_setend(cpu_env); + s->is_jmp = DISAS_UPDATE; } return; } else if ((insn & 0x0fffff00) == 0x057ff000) { @@ -11121,10 +11120,9 @@ static void disas_thumb_insn(CPUARMState *env, DisasContext *s) case 2: /* setend */ ARCH(6); - if (((insn >> 3) & 1) != bswap_code(s->sctlr_b)) { - /* Dynamic endianness switching not implemented. */ - qemu_log_mask(LOG_UNIMP, "arm: unimplemented setend\n"); - goto illegal_op; + if (((insn >> 3) & 1) != !!(s->be_data == MO_BE)) { + gen_helper_setend(cpu_env); + s->is_jmp = DISAS_UPDATE; } break; case 3: |