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authorRichard Henderson <rth@twiddle.net>2013-05-02 12:18:38 +0100
committerRichard Henderson <rth@twiddle.net>2013-07-09 07:14:35 -0700
commit72e1ccfc0cf32005e23d308edfe2d06c7472154e (patch)
tree41589584b6613c10fbb317365d7c11a6197a19d3
parentc1a61f6c85f63d379b4a03d399986174371f5c2e (diff)
tcg-arm: Make use of conditional availability of opcodes for divide
We can now detect and use divide instructions at runtime, rather than having to restrict their availability to compile-time. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
-rw-r--r--tcg/arm/tcg-target.c16
-rw-r--r--tcg/arm/tcg-target.h14
2 files changed, 22 insertions, 8 deletions
diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c
index 8321f80c24..648137fb52 100644
--- a/tcg/arm/tcg-target.c
+++ b/tcg/arm/tcg-target.c
@@ -67,6 +67,13 @@ static const int use_armv7_instructions = 0;
#endif
#undef USE_ARMV7_INSTRUCTIONS
+#ifndef use_idiv_instructions
+bool use_idiv_instructions;
+#endif
+#ifdef CONFIG_GETAUXVAL
+# include <sys/auxv.h>
+#endif
+
#ifndef NDEBUG
static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
"%r0",
@@ -2029,16 +2036,21 @@ static const TCGTargetOpDef arm_op_defs[] = {
{ INDEX_op_deposit_i32, { "r", "0", "rZ" } },
-#if TCG_TARGET_HAS_div_i32
{ INDEX_op_div_i32, { "r", "r", "r" } },
{ INDEX_op_divu_i32, { "r", "r", "r" } },
-#endif
{ -1 },
};
static void tcg_target_init(TCGContext *s)
{
+#if defined(CONFIG_GETAUXVAL) && !defined(use_idiv_instructions)
+ {
+ unsigned long hwcap = getauxval(AT_HWCAP);
+ use_idiv_instructions = (hwcap & HWCAP_ARM_IDIVA) != 0;
+ }
+#endif
+
tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffff);
tcg_regset_set32(tcg_target_call_clobber_regs, 0,
(1 << TCG_REG_R0) |
diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h
index 263ea03a02..5cd9d6a679 100644
--- a/tcg/arm/tcg-target.h
+++ b/tcg/arm/tcg-target.h
@@ -49,6 +49,13 @@ typedef enum {
#define TCG_TARGET_NB_REGS 16
+#ifdef __ARM_ARCH_EXT_IDIV__
+#define use_idiv_instructions 1
+#else
+extern bool use_idiv_instructions;
+#endif
+
+
/* used for function call generation */
#define TCG_REG_CALL_STACK TCG_REG_R13
#define TCG_TARGET_STACK_ALIGN 8
@@ -73,12 +80,7 @@ typedef enum {
#define TCG_TARGET_HAS_deposit_i32 1
#define TCG_TARGET_HAS_movcond_i32 1
#define TCG_TARGET_HAS_muls2_i32 1
-
-#ifdef __ARM_ARCH_EXT_IDIV__
-#define TCG_TARGET_HAS_div_i32 1
-#else
-#define TCG_TARGET_HAS_div_i32 0
-#endif
+#define TCG_TARGET_HAS_div_i32 use_idiv_instructions
#define TCG_TARGET_HAS_rem_i32 0
extern bool tcg_target_deposit_valid(int ofs, int len);