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authorFilip Navara <filip.navara@gmail.com>2009-10-15 12:55:26 +0200
committerAurelien Jarno <aurelien@aurel32.net>2009-10-17 23:52:17 +0200
commit15bb4eac129931329e3b4d1493331b780d2a92f4 (patch)
tree5a38bfdd1a59e8fe14f1f66ef0948d7b615373f4
parent194576157afb34f7ce69cde800bf9715c730b39f (diff)
target-arm: fix TANDC and TORC instructions
Uninitialized register was used instead of proper TCG variable. Signed-off-by: Filip Navara <filip.navara@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
-rw-r--r--target-arm/translate.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 8c5afb7234..454d67f9a8 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -1898,6 +1898,7 @@ static int disas_iwmmxt_insn(CPUState *env, DisasContext *s, uint32_t insn)
if ((insn & 0x000ff00f) != 0x0003f000)
return 1;
gen_op_iwmmxt_movl_T1_wCx(ARM_IWMMXT_wCASF);
+ gen_op_movl_T0_T1();
switch ((insn >> 22) & 3) {
case 0:
for (i = 0; i < 7; i ++) {
@@ -1944,6 +1945,7 @@ static int disas_iwmmxt_insn(CPUState *env, DisasContext *s, uint32_t insn)
if ((insn & 0x000ff00f) != 0x0003f000)
return 1;
gen_op_iwmmxt_movl_T1_wCx(ARM_IWMMXT_wCASF);
+ gen_op_movl_T0_T1();
switch ((insn >> 22) & 3) {
case 0:
for (i = 0; i < 7; i ++) {