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authorPeter Maydell <peter.maydell@linaro.org>2020-05-07 16:18:18 +0100
committerPeter Maydell <peter.maydell@linaro.org>2020-05-21 20:00:18 +0100
commitba7912a55ae836019a97f0f192222616388fb154 (patch)
treee4b03eb93fa37321e8a8daceb6c32fdde635cb90
parent5a1d424487992613582e8ed3d3070833f155cf75 (diff)
docs/system: Document the various MPS2 models
Add basic documentation of the MPS2 board models. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200507151819.28444-5-peter.maydell@linaro.org
-rw-r--r--MAINTAINERS1
-rw-r--r--docs/system/arm/mps2.rst29
-rw-r--r--docs/system/target-arm.rst1
3 files changed, 31 insertions, 0 deletions
diff --git a/MAINTAINERS b/MAINTAINERS
index 6a9280c1b0..520a7b74f2 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -701,6 +701,7 @@ F: hw/misc/armsse-cpuid.c
F: include/hw/misc/armsse-cpuid.h
F: hw/misc/armsse-mhu.c
F: include/hw/misc/armsse-mhu.h
+F: docs/system/arm/mps2.rst
Musca
M: Peter Maydell <peter.maydell@linaro.org>
diff --git a/docs/system/arm/mps2.rst b/docs/system/arm/mps2.rst
new file mode 100644
index 0000000000..3a98cb59b0
--- /dev/null
+++ b/docs/system/arm/mps2.rst
@@ -0,0 +1,29 @@
+Arm MPS2 boards (``mps2-an385``, ``mps2-an505``, ``mps2-an511``, ``mps2-an521``)
+================================================================================
+
+These board models all use Arm M-profile CPUs.
+
+The Arm MPS2 and MPS2+ dev boards are FPGA based (the 2+ has a bigger
+FPGA but is otherwise the same as the 2). Since the CPU itself
+and most of the devices are in the FPGA, the details of the board
+as seen by the guest depend significantly on the FPGA image.
+
+QEMU models the following FPGA images:
+
+``mps2-an385``
+ Cortex-M3 as documented in ARM Application Note AN385
+``mps2-an511``
+ Cortex-M3 'DesignStart' as documented in AN511
+``mps2-an505``
+ Cortex-M33 as documented in ARM Application Note AN505
+``mps2-an521``
+ Dual Cortex-M33 as documented in Application Note AN521
+
+Differences between QEMU and real hardware:
+
+- AN385 remapping of low 16K of memory to either ZBT SSRAM1 or to
+ block RAM is unimplemented (QEMU always maps this to ZBT SSRAM1, as
+ if zbt_boot_ctrl is always zero)
+- QEMU provides a LAN9118 ethernet rather than LAN9220; the only guest
+ visible difference is that the LAN9118 doesn't support checksum
+ offloading
diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst
index 1c759aa1a0..f2d9366e9b 100644
--- a/docs/system/target-arm.rst
+++ b/docs/system/target-arm.rst
@@ -76,6 +76,7 @@ undocumented; you can get a complete list by running
:maxdepth: 1
arm/integratorcp
+ arm/mps2
arm/realview
arm/versatile
arm/vexpress