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authorJean-Christophe Dubois <jcd@tribudubois.net>2020-07-13 14:36:08 +0100
committerPeter Maydell <peter.maydell@linaro.org>2020-07-13 14:36:08 +0100
commit1f7197deb0b33d858538df8e664d97d57be68e26 (patch)
tree604b121c29b4ea24c1c8c53f36b0c30e1324484a
parenta9c167a3c45a2a77fadf8a6f7fa6982b05e64395 (diff)
Add the ability to change the FEC PHY MDIO devices numbers on i.MX7 processor
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: c850187322be9930e47c8b234c385a7d0da245cb.1593806826.git.jcd@tribudubois.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: updated for object_property_set_uint() argument reordering] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--hw/arm/fsl-imx7.c9
-rw-r--r--include/hw/arm/fsl-imx7.h1
2 files changed, 10 insertions, 0 deletions
diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c
index fad637d328..2ff2cab924 100644
--- a/hw/arm/fsl-imx7.c
+++ b/hw/arm/fsl-imx7.c
@@ -363,6 +363,8 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
FSL_IMX7_ENET2_ADDR,
};
+ object_property_set_uint(OBJECT(&s->eth[i]), "phy-num",
+ s->phy_num[i], &error_abort);
object_property_set_uint(OBJECT(&s->eth[i]), "tx-ring-num",
FSL_IMX7_ETH_NUM_TX_RINGS, &error_abort);
qdev_set_nic_properties(DEVICE(&s->eth[i]), &nd_table[i]);
@@ -550,10 +552,17 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
FSL_IMX7_PCIE_PHY_SIZE);
}
+static Property fsl_imx7_properties[] = {
+ DEFINE_PROP_UINT32("fec1-phy-num", FslIMX7State, phy_num[0], 0),
+ DEFINE_PROP_UINT32("fec2-phy-num", FslIMX7State, phy_num[1], 1),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
static void fsl_imx7_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
+ device_class_set_props(dc, fsl_imx7_properties);
dc->realize = fsl_imx7_realize;
/* Reason: Uses serial_hds and nd_table in realize() directly */
diff --git a/include/hw/arm/fsl-imx7.h b/include/hw/arm/fsl-imx7.h
index da977f9ffb..ad88923707 100644
--- a/include/hw/arm/fsl-imx7.h
+++ b/include/hw/arm/fsl-imx7.h
@@ -81,6 +81,7 @@ typedef struct FslIMX7State {
IMX7GPRState gpr;
ChipideaState usb[FSL_IMX7_NUM_USBS];
DesignwarePCIEHost pcie;
+ uint32_t phy_num[FSL_IMX7_NUM_ETHS];
} FslIMX7State;
enum FslIMX7MemoryMap {